MT41J256M4 Datasheet, PDF (138/181 Pages) Micon Design Technology Corporation – 1Gb: x4, x8, x16 DDR3 SDRAM

Figure 82: ^tRPRE Timing
CK
CK#
tA
DQS
Single-ended signal provided
as background information
t_C
DQS#
Single-ended signal provided
as background information
T1
tRPRE _begins
DQS - DQS#
Resulting differential
signal relevant for
tRPRE _{specification}
Figure 83: ^tRPST Timing
CK
CK#
DQS
Single-ended signal, provided
as background information
DQS#
Single-ended signal, provided
as background information
1Gb: x4, x8, x16 DDR3 SDRAM
Operations
VTT
tB
VTT
tD
VTT
tRPRE
0V
T2
tRPRE _ends
VTT
tA
VTT
tB
t_C
tD
VTT
DQS - DQS#
Resulting differential
signal relevant for
tRP_{ST specification}
tRP_ST
0V
T1
tRP_{ST begins}
T2
tRP_{ST ends}
PDF: 09005aef826aa906/Source: 09005aef82a357c3
1Gb_DDR3_4.fm - Rev. D 8/1/08 EN
138
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2006 Micron Technology, Inc. All rights reserved.