DS89C420_02 Datasheet, PDF (45/58 Pages) Maxim Integrated Products – Ultra-High-Speed Microcontroller

DS89C420
NOTES:
1) Specifications to -40°C are guaranteed by design and not production tested.
2) All voltages are referenced to ground.
3) Active current is measured with a 33MHz clock source driving XTAL1, V_CC = RST = 5.5V. All other
pins disconnected.
4) Idle mode current measured with a 33MHz clock source driving XTAL1, V_CC = 5.5V, RST at ground.
All other pins disconnected.
5) Stop mode measured with XTAL and RST grounded, V_CC = 5.5V. All other pins disconnected.
6) When addressing external memory.
7) RST = 5.5V. This condition mimics the operation of pins in I/O mode.
8) During a 0-to-1 transition, a one-shot drives the ports hard for two clock cycles. This measurement
reflects a port pin in transition mode.
9) Ports 1, 2, and 3 source transition current when being pulled down externally. The current reaches its
maximum at approximately 2V.
10) This port is a weak address holding latch in bus mode. Peak current occurs near the input transition
point of the holding latch at approximately 2V.
11) RST = 5.5V. Port 0 floating during reset and when in the logic- high state during I/O mode.
12) While the specifications for V_PFW and V_RST overlap, the design of the hardware makes it such that this
is not possible. Within the ranges given, there is a guaranteed separation between these two voltages.
13) The user should note that this part is tested and guaranteed to operate down to 4.5V (10%) and that
V_RST (min) is specified below that point. This indicates that there is a range of voltages [V_MIN to V_RST
(min)] where the processor’s operation is not guaranteed, but the reset trip point has not been reached.
This should not be an issue in most applications, but should be considered when proper operation
must be maintained at all times. For these applications, it may be desirable to use a more accurate
external reset.
14) Guaranteed by design.
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