DS89C420_02 Datasheet, PDF (15/58 Pages) Maxim Integrated Products – Ultra-High-Speed Microcontroller

DS89C420
MEMORY CONFIGURATION
As illustrated in Figure 2, the DS89C420 incorporates two 8kB flash memories for on-chip program
memory and 1kB of SRAM for on-chip data memory or a particular range (400–7FF) of “alternate”
program memory space. The DS89C420 uses an address scheme that separates program memory from
data memory, such that the 16-bit address bus can address each memory area up to 64kB.
PROGRAM MEMORY ACCESS
On-chip program memory begins at address 0000h and is contiguous through 3FFFh (16kB). Exceeding
the maximum address of on-chip program memory causes the device to access off-chip memory.
However, the maximum on-chip decoded address is selectable by software using the ROMSIZE feature.
Software can cause the DS89C420 to behave like a device with less on-chip memory. This is beneficial
when overlapping external memory is used. The maximum memory size is dynamically variable. Thus, a
portion of memory can be removed from the memory map to access off-chip memory, then be restored to
access on-chip memory. In fact, all of the on-chip memory can be removed from the memory map
allowing the full 64kB memory space to be addressed from off-chip memory. Program memory addresses
that are larger than the selected maximum are automatically fetched from outside the part through ports 0
and 2 (Figure 2).
The ROMSIZE register is used to select the maximum on-chip decoded address for program memory.
Bits RMS2, RMS1, RMS0 have the following effect:
RMS2
0
0
0
0
1
1
1
1
RMS1
0
0
1
1
0
0
1
1
RMS0
ADDRESS
0
1
0
1
0
1
0
1
MAXIMUM ON-CHIP
PROGRAM MEMORY
0k
1k/03FFh
2k/07FFh
4k/0FFFh
8k/1FFFh
16k (default)/3FFFh
Invalid–Reserved
Invalid–Reserved
The reset default condition is a maximum on-chip program- memory address of 16kB. When accessing
external program memory, the first 16kB would be inaccessible. To select a smaller effective program
memory size, software must alter bits RMS2–RMS0. Altering these bits requires a timed access
procedure as explained later.
Care should be taken so that changing the ROMSIZE register does not corrupt program execution. For
example, assume that a DS89C420 is executing instructions from internal program memory near the
12kB boundary (~3000h) and that the ROMSIZE register is currently configured for a 16kB internal
program space. If software reconfigures the ROMSIZE register to 4kB (0000h–0FFFh) in the current
state, the device immediately jumps to external program execution because program code from 4kB to
16kB (1000h–3FFFh) is no longer located on-chip. This could result in code misalignment and execution
of an invalid instruction. The recommended method is to modify the ROMSIZE register from a location
in memory that is internal (or external) both before and after the operation. In the above example, the
instruction that modifies the ROMSIZE register should be located below the 4kB (1000h) boundary or
above the 16kB (3FFFh) boundary so that it is unaffected by the memory modification. The same
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