DS89C420_02 Datasheet, PDF (4/58 Pages) Maxim Integrated Products – Ultra-High-Speed Microcontroller

Table 1. PIN DESCRIPTION
DS89C420
DIP
40
20
9
18, 19
29
30
PIN
PLCC
12, 44
1, 22, 23,
34
10
20, 21
32
33
TQFP
6, 38
16, 17,
28, 39
4
14, 15
26
27
NAME
FUNCTION
V_CC
V_CC - +5V
GND GND. Logic Ground
RST
XTAL1
XTAL2
PSEN
ALE/ PROG
External Reset. The RST input pin is bidirectional and contains
a Schmitt trigger to recognize external active-high reset inputs.
The pin also employs an internal pulldown resistor to allow for a
combination of wire OR’d external reset sources. An RC is not
required for power-up, since the device provides this function
internally.
XTAL1, XTAL2. The crystal oscillator pins XTAL1 and
XTAL2 provide support for fundamental mode parallel resonant,
AT cut crystals. XTAL1 also acts as an input if there is an
external clock source in place of a crystal. XTAL2 serves as the
output of the crystal amplifier.
Program Store Enable. This signal is commonly connected to
optional external program memory as a chip enable. PSEN
provides an active-low pulse and is driven high when external
program memory is not being accessed.
In 1-cycle page mode 1, PSEN remains low for consecutive
page hits.
Address Latch Enable. Functions as a clock to latch the
external address LSB from the multiplexed address/data bus on
Port 0. This signal is commonly connected to the latch enable of
an external 373 family transparent latch. In default mode, ALE
has a pulse width of 1.5 XTAL1 cycles and a period of four
XTAL1 cycles. In page mode, the ALE pulse width is altered
according to the page mode selection. In traditional 8051 mode,
ALE is high when using the EMI reduction mode and during a
reset condition. ALE can be enabled by writing ALEON = 1
(PMR.2). Note that ALE operates independently of ALEON
during external memory accesses. As an alternate mode, this pin
( PROG) is used to execute the parallel program function.
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