DS89C420_02 Datasheet, PDF (23/58 Pages) Maxim Integrated Products – Ultra-High-Speed Microcontroller

DS89C420
As shown in Table 6, the stretch feature supports eight stretched external data- memory access cycles that
can be categorized into three timing groups. When the stretch value is cleared to 000b, there is no stretch
on external data memory access and a MOVX instruction is completed in two basic memory cycles.
When the stretch value is set to 1, 2, or 3, the external data- memory access is extended by 1, 2, or 3
stretch machine cycles, respectively. Note that the first stretch value does not result in adding four system
clocks to the RD / WR control signals. This is because the first stretch uses one system clock to create
additional setup time and one system clock to create additional address hold time. When using very slow
RAM and peripherals, a larger stretch value (4–7) can be selected. In this stretch category, one stretch
machine cycle (4 system clocks) is used to stretch the ALE pulse width, one stretch machine cycle is used
to create additional setup, one stretch machine cycle is used to create additional hold time, and one stretch
machine cycle is added to the RD or WR strobes.
Figures 4 and 5 illustrate the timing relationship for external data- memory access in full speed (stretch
value = 0), in the default stretch setting (stretch value =1), and slow data- memory accessing
(stretch value = 4) when the system clock is in divide by one mode (CD1:CD0 = 10b).
Figure 4. NON-PAGE MODE, EXTERNAL DATA-MEMORY ACCESS
(STRETCH = 0, CD1:CD2 = 10)
XTAL1
MOVX Instruction
1st Machine Cycle 2nd Machine Cycle
ALE
PSEN
RD WR
Port 0
Port 2
A
MOVX
A
A
MOVX
Instruction
Fetch
INST
A
DATA
A
Memory
Access
Stretch = 0
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