DS8007A Datasheet, PDF (34/41 Pages) Maxim Integrated Products – Multiprotocol Dual Smart Card Interface

Multiprotocol Dual Smart Card Interface
tinue to be used until a successful PPS exchange is
completed. The negotiated Fn, Dn values are then used
after a successful PPS exchange. If the card comes up
in specific mode (i.e., TA(2) is present in ATR), then the
indicated Fi, Di values apply immediately after suc-
cessful ATR if bit 5 of the TA(2) character is 0. If bit 5 of
TA(2) is 1, implicit values should be used. The TA(1)
character of ATR, if present, contains the Fi and Di val-
ues indicated by the card.
Table 5 demonstrates how the prescaler (PSC) bit and
programmable divider register (PDRx) can be config-
ured to generate the requested F/D ratios. All settings
assume that the CKU bit is configured to its reset
default logic 0 state.
Table 4. Fi, Di Parameter Possibilities
TA(1).FI
Fi
MAX CLKx (MHz)
Fi =
TA(1).DI
Di
0000
372
4
31 x 12
0000
RFU
0001
372
5
31 x 12
0001
1
0010
558
6
31 x 18
0010
2
0011
744
8
31 x 24
0011
4
0100
1116
12
31 x 36
0100
8
0101
1488
16
31 x 48
0101
16
0110
1860
20
31 x 60
0110
32
0111
RFU
—
—
0111
RFU
1000
RFU
—
—
1000
RFU
1001
512
5
32 x 16
1001
12
1010
768
7.5
32 x 24
1010
20
1011
1024
10
32 x 32
1011
RFU
1100
1536
15
32 x 48
1100
RFU
1101
2048
20
32 x 64
1101
RFU
1110
RFU
RFU
—
1110
RFU
1111
RFU
RFU
—
1111
RFU
RFU = Reserved for future use.
Table 5. PSC, PDR Settings to Support F,D Parameters
TA(1).Fi
0000
0001
0010
0011
0100
0101
0110
1001
1010
1011
1100
1101
PSC
0 = /31
1 = /32
0
0
0
0
0
0
0
1
1
1
1
1
0001
12
12
18
24
36
48
60
16
24
32
48
64
0010
6
6
9
12
18
24
30
8
12
16
24
32
0011
3
3
—
6
9
12
15
4
6
8
12
16
PDR SETTING FOR Di =
0100
—
—
—
3
—
6
—
2
3
4
6
8
0101
—
—
—
—
—
3
—
1
—
2
3
4
0110
—
—
—
—
—
—
—
—
—
1
—
2
1000
1
1
—
2
3
4
5
—
2
—
4
—
1001
—
—
—
—
—
—
3
—
—
—
—
—
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