DS8007A Datasheet, PDF (31/41 Pages) Maxim Integrated Products – Multiprotocol Dual Smart Card Interface

Multiprotocol Dual Smart Card Interface
Table 3. Timeout Counter Configurations (continued)
TOC VALUE
TOR3 TOR2
TOR1
DESCRIPTION
Counter 1 is stopped. Counters 3 and 2 form a 16-bit counter
operating in start bit mode for both transmission and reception.
71h
Start Bit
Stopped
TOR3 and TOR2 registers can be changed during the count, the
current count is not affected, and the values are taken into account
at the next START bit detected on the I/Ox pin. Setting TOC = 00h
stops the counters.
Counter 1 is an 8-bit counter in start-bit/autoreload mode for both
transmission and reception; counters 3 and 2 form a 16-bit counter
operating in start-bit mode for both transmission and reception. The
75h
Start Bit
Start
TOR1 register is not allowed to change during the count. TOR3,
Bit/Autoreload TOR2 registers can be changed during the count, the current count
is not affected, and the values are taken into account at the next
START bit detected on the I/Ox pin. Setting TOC = 00h stops the
counters.
Counters 1/2/3 form a 24-bit counter operating in start-bit mode in
both transmission and reception. TOR3, TOR2 and TOR1 registers
7Ch
Start Bit
can be changed during the count, the current count is not affected,
and the value is taken into account at the next START bit detected
on the I/Ox pin. Setting TOC = 00h stops the counter.
Start
Bit/Autostop
Counters 3 and 2 are stopped. Counter 1 is operated in start-
bit/autostop mode in reception and is stopped at the end of the
85h
Stopped
(RCV);
Start
12th ETU following the first received START bit detected on the
I/Ox pin unless the terminal count is reached first. Counter 1
Bit/Autoreload
(XMT)
operates in start-bit/autoreload mode in transmission.
E5h
Software
Start
Bit/Autostop
(RCV);
Start
Counters 3 and 2 form a 16-bit counter operating in software mode.
The counters are stopped by setting TOC = 05h before reloading
new values in TOR3 and TOR2 registers. Counter 1 is operated in
autostop mode in reception and is stopped at the end of the 12th
Bit/Autoreload
(XMT)
ETU following the first received START bit detected on the I/Ox pin
unless the terminal count is reached first. Counter 1 is operated in
start-bit/autoreload mode in transmission.
Counter 1 is stopped. Counters 3 and 2 form a 16-bit counter. The
Start Bit/Autostop
16-bit counter is operated in start-bit/auto-stop mode in reception
F1h
(RCV);
Start Bit (XMT)
Stopped
and is stopped at the end of the 12th ETU following the first
received START bit detected on the I/Ox pin unless the terminal
count is reached first; and the 16-bit counter is operated in start-bit
mode in transmission.
Counter 1 is an 8-bit counter operating in start-bit/autostop mode in
reception and is stopped at the end of the 12th ETU following the
Start
first received START bit detected on the I/Ox pin unless the
F5h
Start Bit/Autostop
(RCV);
Start Bit (XMT)
Bit/Autostop
(RCV);
Start
Bit/Autoreloa
terminal count is reached first; and the 8-bit counter is operated in
start-bit/autoreload mode in transmission. Counters 3 and 2 form a
16-bit counter operating in start-bit mode for transmission but
operate in start-bit/autostop mode in reception. Counters 3 and 2
d (XMT)
are stopped at the end of the 12th ETU following the first received
START bit detected on the I/Ox pin unless the terminal count is
reached first; the counters are stopped by setting TOC = 00h.
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