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DS8007A Datasheet, PDF (26/41 Pages) Maxim Integrated Products – Multiprotocol Dual Smart Card Interface
Multiprotocol Dual Smart Card Interface
Card Interface Voltage Regulation
and Step-Up Converter Operation
The VDD and VDDA pins supply power to the DS8007A.
Voltage supervisor circuitry detects the input voltage
levels and automatically engages a step-up converter if
necessary to generate the appropriate voltages to the
card interfaces according to the control register set-
tings. The conversion process is transparent to the user
and is usually only noticed by changes in the VUP pin
voltage, which reflects the operation of the internal
charge pump. Table 2 elaborates on the VUP pin.
The VDD and VDDA pins must be decoupled externally,
but extra care must be taken to decouple large current
spikes that can occur on the VDDA pins because of
noise generated by the cards and internal voltage step-
up circuitry.
Voltage Supply Supervision
The voltage supervisor circuitry monitors VDD and
holds the device in reset until VDD is at a satisfactory
level. The DELAY pin is an external indicator of the
state of internal power and can also be driven external-
ly to hold the device in a reset state. An external capac-
itor is usually attached to this pin, defining the time
constant of a power-on delay for the DS8007A. When
VDD is below the voltage threshold VRST, the charging
path that exists between VDD and DELAY is discon-
nected and a strong pulldown is enabled on the DELAY
pin. Once VDD exceeds VRST, the strong pulldown on
the DELAY pin is released and the pullup to VDD is
enabled, allowing the external DELAY capacitor to be
charged.
The RSTOUT alarm pin is released (allowing it to be
pulled up externally) whenever the DELAY pin voltage
is less than VDRST, whether caused by VDD < VRST or
as a result of external hardware pulling the DELAY pin
Table 2. Step-Up Converter Operation
VDDA
< 2.4
2.4–3.5
3.5–5.5
5.5–6.0
2.4–3.5
> 3.5
2.4–6.0
VOLTAGE (V)
SMART CARD
X
5
5
5
3.0
3.0
1.8
VUP
VDDA
5.7
5.7
VDDA
4.1
VDDA
VDDA
low. The minimum duration of the RSTOUT pulse (tW
specification) is defined by the capacitor connected to
the DELAY pin and is typically 1ms per 2nF. The
RSTOUT pin is driven strongly low once the DELAY pin
exceeds the VDRST voltage threshold.
The SUPL bit is set on initial power-up and is reset
again when the RSTOUT alarm pulse occurs. The SUPL
bit may only be cleared by a read of the HSR register.
Figure 8 illustrates the sequencing of the various sig-
nals involved.
Short-circuit and thermal-protection circuitry prevent
damages done by accidentally shorting the VCCx pins
or when the ambient temperature is exceeding the
maximum operating temperature. When the internal
temperature is approximately +150°C, the voltage VCCx
and the drivers to the CLKx, RSTx, I/Ox, C4x, and C8x
signals to both card interfaces are turned off. The PTL
bit in the HSR is set and an interrupt is generated.
When a short is detected on the RSTx pin, the device
initiates a normal deactivation sequence. A short on
I/Ox, C4x, and C8x does not cause deactivation.
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