MAX1415 Datasheet, PDF (33/36 Pages) Maxim Integrated Products – 16-Bit, Low-Power, 2-Channel, Sigma-Delta ADCs

16-Bit, Low-Power, 2-Channel,
Sigma-Delta ADCs
fer function and the actual measured value at this code
transition. Unlike gain error, unipolar offset error and
bipolar zero error are included in the positive full-scale
error measurement.
Bipolar Negative Full-Scale Error
For the ideal transfer curve, the code edge transition that
causes a negative full-scale transition to occur is 0.5 LSB
above negative full scale. The negative full-scale error is
the difference between the ideal value at this code transi-
tion and the actual measured value at this code transition.
Input Common-Mode Rejection
Input common-mode rejection is the ability of a device
to reject a signal that is common to or applied to both
input terminals. The common-mode signal can be
either an AC or a DC signal or a combination of the two.
CMR is often expressed in decibels. Common-mode
rejection ratio (CMRR) is the ratio of the differential sig-
nal gain to the common-mode signal gain.
Power-Supply Rejection Ratio
Power-supply rejection ratio (PSRR) is the ratio of the
input signal change (V) to the change in the converter
output (V). It is typically measured in decibels.
+VDD
VCC
6N136
470kΩ
MOSI
ISO
3V/5V
VDD
2kΩ
DIN
MAX1415
MAX1416
VCC
6N136
470kΩ
SCK
VCC
2kΩ
SCLK
MISO
2kΩ
6N136
470kΩ
DOUT
CS
Figure 13. Optically Isolated Interface
Ordering Information (continued)
PART
TEMP RANGE
PIN-
PACKAGE
MAX1416ENE* -45°C to +85°C 16 PDIP
MAX1416EWE*
MAX1416EUE
-45°C to +85°C 16 Wide SO
-45°C to +85°C 16 TSSOP
MAX1416AENE* -45°C to +85°C 16 PDIP
MAX1416AEWE* -45°C to +85°C 16 Wide SO
MAX1416AEUE* -45°C to +85°C 16 TSSOP
MAX1416CNE*
0°C to +70°C 16 PDIP
MAX1416CWE*
0°C to +70°C 16 Wide SO
MAX1416CUE*
0°C to +70°C 16 TSSOP
*Future product—contact factory for availability.
V_DD (V)
5
5
5
5
5
5
5
5
5
Chip Information
TRANSISTOR COUNT: 42,000
PROCESS: BiCMOS
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