MAX1415 Datasheet, PDF (19/36 Pages) Maxim Integrated Products – 16-Bit, Low-Power, 2-Channel, Sigma-Delta ADCs

16-Bit, Low-Power, 2-Channel,
Sigma-Delta ADCs
Functional Diagram
AIN1+
AIN1-
AIN2+
AIN2-
REF+
REF-
BUFFER
MAX1415
MAX1416
CLOCK
GENERATOR
MUX
S1
S2
2nd-ORDER
PGA
SIGMA-DELTA
MODULATOR
DIGITAL
FILTER
BUFFER
S1 AND S2 ARE OPEN IN
BUFFERED MODE AND CLOSED
IN UNBUFFERED MODE
SERIAL INTERFACE,
REGISTERS,
AND
CONTROL
CLKIN
CLKOUT
V_DD
GND
CS
SCLK
DIN
DOUT
DRDY
RESET
Detailed Description
The MAX1415/MAX1416 low-power, 2-channel serial
output ADCs use a sigma-delta modulator with a digital
filter to achieve 16-bit resolution with no missing codes.
Each device includes a PGA, an on-chip input buffer,
an internal oscillator, and a bidirectional communica-
tions port. The MAX1415 operates with a 2.7V to 3.6V
single supply, and the MAX1416 operates with a 4.75V
to 5.25V single supply.
Fully differential inputs, an internal input buffer, and an
on-chip PGA (gain = 1 to 128) allow low-level signals to
be directly measured, minimizing the requirements for
external signal conditioning. Self-calibration corrects for
gain and offset errors. A programmable digital filter
allows for the selection of the output data rate and first
notch frequency from 20Hz to 500Hz.
The bidirectional serial SPI-/QSPI-/MICROWIRE-compati-
ble interface consists of four digital control lines (SCLK,
CS, DOUT, and DIN) and provides an easy interface to
microcontrollers (µCs). Connect CS to GND to configure
the MAX1415/MAX1416 for 3-wire operation.
Analog Inputs
The MAX1415/MAX1416 accept four analog inputs
(AIN1+, AIN1-, AIN2+, and AIN2-) in buffered or
unbuffered mode. Use Table 8 to select the positive
and negative input pair for a fully differential channel.
The input buffer isolates the inputs from the capacitive
load presented by the PGA/modulator, allowing for high
source-impedance analog transducers. The value of
the BUF bit in the setup register (see the Setup Register
section) determines whether the input buffer is enabled
or disabled.
Internal protection diodes, which clamp the analog
input to V_DD and/or GND, allow the input to swing from
(GND - 0.3V) to (V_DD + 0.3V), without damaging the
device. If the analog input exceeds 300mV beyond the
supplies, limit the input current to 10mA.
Input Buffers
When the analog input buffer is disabled, the analog
input drives a typical 7pF (gain = 1) capacitor, C_TOTAL,
in series with the 7kΩ typical on-resistance of the track
and hold (T/H) switch (Figure 1). C_TOTAL is comprised
of the sampling capacitor, C_SAMP, and the stray capac-
itance, C_STRAY. During the conversion, C_SAMP charges
to (AIN+ - AIN-). The gain determines the value of
C_SAMP (see Table 5).
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