MAX14001 Datasheet, PDF (28/34 Pages) Maxim Integrated Products – Configurable, Isolated 10-bit ADCs for Multi-Range Binary Inputs

MAX14001/MAX14002
Configurable, Isolated 10-bit ADCs for
Multi-Range Binary Inputs
FLTV (Read/Write)
Address = 0x13
Default = 0x000
FLTEN verification register. Bits are continually compared to the FLTEN register. If any bits do not match, the MV bit in
the FLAGS register is set and FAULT is asserted if the EMV bit in the FLTEN register is set. POR value is 1’s complement
of FLTEN register POR value.
BIT
FIELD NAME
DESCRIPTION
9:0
FLTV[9:0]
FLTEN verification register. Bits are continually compared to the FLTEN register.
THLV (Read/Write)
Address = 0x14
Default = 0x2FF
THL verification register. Bits are continually compared to the THL register. If any bits do not match, the MV bit in the
FLAGS register is set and FAULT is asserted if the EMV bit in the FLTEN register is set. POR value is 1’s complement
of THL register POR value.
BIT
FIELD NAME
DESCRIPTION
9:0
THLV[9:0]
THL verification register. Bits are continually compared to the THL register.
THUV (Read/Write)
Address = 0x15
Default = 0x1FF
THU verification register. Bits are continually compared to the THU register. If any bits do not match, the MV bit in the
FLAGS register is set and FAULT is asserted if the EMV bit in the FLTEN register is set. POR value is 1’s complement
of THU register POR value.
BIT
FIELD NAME
DESCRIPTION
9:0
THUV[9:0]
THU verification register. Bits are continually compared to the THU register.
INRRV (Read/Write) (Read only for MAX14002)
Address = 0x16
Default = 0x33F (0x0C0 for MAX14002)
INRR verification register. Bits are continually compared to the INRR register. If any bits do not match, the MV bit in the
FLAGS register is set and FAULT is asserted if the EMV bit in the FLTEN register is set. POR value is 1’s complement
of INRR register POR value.
Note: this register is not used in MAX14002. Default value is fixed at 0x0C0.
BIT
FIELD NAME
DESCRIPTION
9:0
INRRV[9:0]
INRR verification register. Bits are continually compared to the INRR register.
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