MAX14001 Datasheet, PDF (24/34 Pages) Maxim Integrated Products – Configurable, Isolated 10-bit ADCs for Multi-Range Binary Inputs

MAX14001/MAX14002
Configurable, Isolated 10-bit ADCs for
Multi-Range Binary Inputs
THU (Read/Write)
Address = 0x05
Default = 0x200
User-programmed upper comparator threshold. When the output of the comparator is low, this value is compared to ADC
(or FADC as set by IRAW, FT0, and FT1). If ADC ≥ THU, the comparator output COUT is set high. To prevent oscillation,
the value of THU should be larger than THL.
BIT
FIELD NAME
DESCRIPTION
9:0
THU[9:0]
Upper comparator threshold (straight binary)
INRR (Read/Write) (Read only for MAX14002)
Address = 0x06
Default = 0x0C0
User-programmed inrush timer re-arm threshold. ADC reading must drop below this value before another inrush pulse
will occur when the input voltage exceeds INRT. This register is not used in the MAX14002, which always uses FAST
mode (see bit 1 of the CFG register).
BIT
FIELD NAME
DESCRIPTION
9:0
INRR[9:0]
Inrush re-arm threshold (straight binary)
INRT (Read/Write) (Ready only for MAX14002)
Address = 0x07
Default = 0x180
User-programmed inrush current trigger threshold. When the inrush timer is armed, an inrush pulse is initiated when the
ADC reading equals or exceeds this value. This register is not used in the MAX14002, which always uses FAST mode
(see bit 1 of the CFG register).
BIT
FIELD NAME
DESCRIPTION
9:0
INRT[9:0]
Inrush trigger threshold (straight binary)
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