LTC3863_15 Datasheet, PDF (9/38 Pages) Linear Technology – 60V Low IQ Inverting DC/DC Controller

LTC3863
Pin Functions
GATE (Pin 12): Gate Drive Output for External P-Channel
MOSFET. The gate driver bias supply voltage (V_IN-V_CAP)
is regulated to 8V when V_IN is greater than 8V. The gate
driver is disabled when (V_IN-V_CAP) is less than 3.5V (typi-
cal), 3.8V maximum in start-up and 3.25V (typical) 3.5V
maximum in normal operation.
PGND (Exposed Pad Pin 13): Ground Reference for Power
Components (Power Ground). The PGND exposed pad must
be soldered to the circuit board for electrical contact and
for rated thermal performance of the package. Connect
signal ground to power ground only at one point using a
single PCB trace.
FUNCTIONAL Diagram
0.4µA
RUN
RUN
+
–
1.26V –
CLOCK
PLLIN/MODE _MODE/CLOCK
DETECT
FREQ
20µA _VCO
R_FREQ
SGND
UVLO
3.25V
V_IN
SENSE
Q
SR
PLL
SYSTEM
LOGIC
CONTROL
ICMP
–+
Burst Mode
OPERATION
O.425V
GATE
DRV
IN
LDO
OUT
V_IN – 8V
CAP
+
SLOPE
COMPENSATION
OV
0.88V
10µA
0.8V
EN
EA
(G_m = 1.8mS)
SS
0.5µA
V_FBN
PGND
ITH
R_ITH
C_ITH1
V_FB
3863 FD
V_IN
C_IN
R_SENSE
MP
D1
C_CAP
L
V_OUT
C_OUT
C_SS
R_FB1
C_FB2
R_FB2
For more information www.linear.com/3863
3863fa
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