LTC3863_15 Datasheet, PDF (23/38 Pages) Linear Technology – 60V Low IQ Inverting DC/DC Controller

LTC3863
Applications Information
the feedback loop. The output voltage settling behavior is
related to the stability of the closed-loop system and will
demonstrate overall performance of the regulator.
In some applications, a more severe transient can be caused
by switching in loads with large (>10μF) input capacitors.
If the switch connecting the load has low resistance and
is driven quickly, then the discharged input capacitors are
effectively put in parallel with C_OUT , causing a rapid drop in
V_OUT . No regulator can deliver enough current to prevent
this problem. The solution is to limit the turn-on speed of
the load switch driver. A Hot Swap™ controller is designed
specifically for this purpose and usually incorporates cur-
rent limiting, short-circuit protection and soft-start.
Large-Signal Effects on ITH
Inverting controllers have a wide range of applications
and operating conditions which affect compensation.
Low switching frequencies and the inverting buck-boost
right-half-plane zero can result in very low gain crossover
frequency requirements. Low crossover frequencies often
require a compensation R_ITH and C_ITH that are too small for
the error amplifier output drive current on ITH of 100µA.
The effect causes ITH to appear clamped in response
to a transient load current step which causes excessive
output droop.
An R_ITH greater than 20k allows ITH to swing 1.5V with
margin for temperature and part to part variation and
should never have this issue. In applications with less
severe transient load step requirements, R_ITH can safely
be set as low as 10k. We do not recommend less than
10k in any application. If R_ITH is too small then either
the operating frequency will need to be increased or the
output capacitor increased to increase the R_ITH required
to stabilize the system. We strongly recommend that any
system with an R_ITH less than 20k be experimentally veri-
fied with worst-case load steps.
Design Example
Consider an inverting converter with the following speci-
fications:
V_IN = 4.5V to 55V, V_OUT = –5V, I_OUT(MAX) = 1.8A, and
f = 320kHz (Figure 7).
The output voltage is programmed according to:
V_OUT
=
–0.8V
•
RFB1
RFB2
320kHz
220pF
0.1µF
15nF
10k
52.3k
0.47µF
RUN ^CAP
V_IN
PLLIN/MODE
SS
SENSE
GATE
LTC3863
ITH
FREQ
SGND
V_FBN
PGND ^VFB
16mΩ
C_IN2 +
4.7µF
100V
×2
V_IN
C_IN1 ^{4.5V TO 55V}
68µF
63V
Q1 ^D1
L1
12µH 187k
C_OUT1
33µF
16V
×2
V_OUT
–5V
C_{OUT3 1.8A}
100µF
20V
12pF 30.1k
3863 F07
C_IN1: CDE AFK686M63G24T-F
C_IN2: TDK CGA6M3X7S2A475K
C_OUT1: TDK C4532X7R1C336M
C_OUT3: PANASONIC 20SVP100M
D1: VISHAY SS8PH9-M3/87A
L1: MSS1278-123ML
Q1: VISHAY Si7469DP
Figure 7. Design Example (4.5V to 55V Input, –5V, 1.8A at 320kHz)
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3863fa
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