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LTC3773 Datasheet, PDF (4/32 Pages) Linear Technology – Triple Output Synchronous 3-Phase DC/DC Controller with Up/Down Tracking
LTC3773
ELECTRICAL CHARACTERISTICS (Note 3) The ● denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at TA = 25°C. VCC = VDR = VBOOST = VSDB = 5V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Power Good Output Indication
VPGL
PGOOD Voltage Output Low
IPGOOD
PGOOD Output Leakage
VPGTHNEG
VPGTHPOS
PGOOD Trip Thresholds
VFB Ramping Negative
VFB Ramping Positive
VPGDLY
PGOOD Delay
Oscillator and Phase-Locked Loop
IPGOOD = 2mA
VPGOOD = 5V
VFB with Respect to 0.6V Reference
PGOOD Goes Low After VPGDLY Delay
0.1 0.3
V
1
μA
–7 –10 –13
%
7
10
13
%
100 150
μs
fNOM
fLOW
fHIGH
fPLLLOW
fPLLHIGH
VLO
VFLOAT
VHI
VPLLIN
IPLLFLTR
Nominal Frequency
Low Frequency
High Frequency
PLLIN Minimum Input Frequency
PLLIN Maximum Input Frequency
PLLIN/FC, PHASEMD, PLLFLTR
Logic Input
Low Level Input Voltage
Floating Voltage
High Level Input Voltage
PLLIN Synchronization Input Threshold
Phase Detector Output Current
Sinking Capability
Sourcing Capability
VPLLFLTR Open
VPLLFLTR = 0V
VPLLFLTR = 5V
VPLLFLTR = 1.5V
fPLLIN < fOSC
fPLLIN > fOSC
360 400 440
kHz
190 220 250
kHz
510 560 630
kHz
160 200
kHz
540 700
kHz
1.0
V
1.6
V
3.0
V
1
V
25
–25
μA
μA
PRELPHS
Controller 2 - Controller 1 Phase
Controller 3 - Controller 1 Phase
PHASEMD Floats or VPHASEMD = 0V
120
Deg
240
Deg
Controller 2 - Controller 1 Phase
Controller 3 - Controller 1 Phase
VPHASEMD = 5V
90
Deg
270
Deg
CLKOUT
Controller 1 TG to CLKOUT Phase
PHASEMD Floats
VPHASEMD = 0V
VPHASEMD = 5V
0
Deg
60
Deg
180
Deg
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3773 is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. TJ is calculated from the ambient
temperature TA and power dissipation PD according to the following
formula.
LTC3773EG: TJ = TA + (PD x 95°C/W)
LTC3773EUHF: TJ = TA + (PD x 34°C/W)
Note 3: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 4: The IC is tested in a feedback loop that adjusts VFB to achieve a
specified error amplifier output voltage (VITH).
Note 5: Guaranteed by design, not subject to test.
Note 6: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 7: RDS(ON) limit is guaranteed by design and/or correlation to static
test.
Note 8: The minimum on-time condition corresponds to an inductor
peak-to-peak ripple current of ≥40% of IMAX (see minimum on-time
considerations in the Applications Information section).
3773fb
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