LTC3773 Datasheet, PDF (17/32 Pages) Linear Technology – Triple Output Synchronous 3-Phase DC/DC Controller with Up/Down Tracking

LTC3773
APPLICATIONS INFORMATION
where δ is the temperature dependency of R_DS(ON), R_DR
is the effective top driver resistance (approximately 2Ω
at V_GS = V_MILLER), and V_IN is the drain potential and the
change in drain potential in the particular application.
V_TH(IL) is the typical gate threshold voltage shown in the
power MOSFET data sheet at the specified drain current.
C_MILLER is the calculated capacitance using the gate charge
curve from the MOSFET data sheet and the technique
described above.
Both MOSFETs have I²R losses while the topside N-channel
equation includes an additional term for transition losses,
which peak at the highest input voltage. For V_IN < 12V,
the high current efficiency generally improves with larger
MOSFETs, while for V_IN > 12V the transition losses rapidly
increase to the point that the use of a higher R_DS(ON) device
with lower C_MILLER actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized R_DS(ON) vs temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The Schottky diodes in Figure 1 conduct during the dead
time between the conduction of the two large power
MOSFETs. This prevents the body diode of the bottom
MOSFET from turning on, storing charge during the dead
time and requiring a reverse recovery period which could
cost as much as several percent in efficiency. A 2A to 8A
Schottky is generally a good compromise for both regions
of operation due to the relatively small average current.
Larger diodes result in additional transition loss due to
their larger junction capacitance.
C_IN and C_OUT Selection
The selection of C_IN is simplified by the 3-phase architec-
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can
be shown that the worst-case capacitor RMS current oc-
curs when only one controller is operating. The controller
with the highest (V_OUT)(I_OUT) product needs to be used to
determine the maximum RMS capacitor current require-
ment. Increasing the output current drawn from the other
controller will actually decrease the input RMS ripple cur-
rent from its maximum value. The out-of-phase technique
typically reduces the input capacitor’s RMS ripple current
by a factor of 30% to 70% when compared to a single
phase power supply solution.
The type of input capacitor, value and ESR rating have ef-
ficiency effects that need to be considered in the selection
process. The capacitance value chosen should be sufficient
to store adequate charge to keep high peak battery currents
down. The ESR of the capacitor is important for capacitor
power dissipation as well as overall battery efficiency. All
the power (RMS ripple current • ESR) not only heats up
the capacitor but wastes power from the battery.
Medium voltage (20V to 35V) ceramic, tantalum, OS-CON
and switcher-rated electrolytic capacitors can be used as
input capacitors, but each has drawbacks: ceramics have
high voltage coefficients of capacitance and may have
audible piezoelectric effects; tantalums need to be surge
rated; OS-CONs suffer from higher inductance, larger
case size and limited surface mount applicability; and
electrolytics’ higher ESR and dry out possibility require
several to be used. Sanyo OS-CON SVP, SVPD series; Sanyo
POSCAP TQC series or aluminum electrolytic capacitors
from Panasonic WA series or Cornell Dubilier SPV series,
in parallel with a couple of high performance ceramic ca-
pacitors, can be used as an effective means of achieving
low ESR and large bulk capacitance. Multiphase systems
allow the lowest amount of capacitance overall. As little
as one 22μF or two to three 10μF ceramic capacitors are
an ideal choice in 20W to 35W power supplies due to their
extremely low ESR. Even though the capacitance at 20V
is substantially below their rating at zero-bias, very low
ESR loss makes ceramics an ideal candidate for highest
efficiency battery operated systems.
In continuous mode, the source current of the top N-chan-
nel MOSFET is a square wave of duty cycle V_OUT/V_IN. To
prevent large voltage transients, a low ESR input capaci-
tor sized for the maximum RMS current of one channel
must be used. The maximum RMS capacitor current is
given by:
I_RMS
I_OUT(MAX)
V_OUT(V_IN – V_OUT )
V_IN
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