LTC3838-1_15 Datasheet, PDF (34/52 Pages) Linear Technology – Dual, Fast, Accurate Step-Down DC/DC Controller with Dual Differential Output Sensing

LTC3838-1
APPLICATIONS INFORMATION
related to the stability of the closed-loop system. However,
it is better to look at the filtered and compensated feedback
loop response at the ITH pin.
The gain of the loop increases with the R_ITH and the band-
width of the loop increases with decreasing C_ITH1. If R_ITH
is increased by the same factor that C_ITH1 is decreased,
the zero frequency will be kept the same, thereby keeping
the phase the same in the most critical frequency range
of the feedback loop. In addition, a feedforward capacitor,
C_FF , can be added to improve the high frequency response,
as used in the typical application at the last page of this
data sheet. Feedback capacitor C_FF provides phase lead by
creating a high frequency zero with R_FB2 which improves
the phase margin.
A more severe transient can be caused by switching in
loads with large supply bypass capacitors. The discharged
bypass capacitors of the load are effectively put in parallel
with the converter’s C_OUT , causing a rapid drop in V_OUT .
No regulator can deliver current quick enough to prevent
this sudden step change in output voltage, if the switch
connecting the C_OUT to the load has low resistance and is
driven quickly. The solution is to limit the turn-on speed
of the load switch driver. Hot Swap™ controllers are de-
signed specifically for this purpose and usually incorporate
current limiting, short-circuit protection and soft starting.
Load-Release Transient Detection
As the output voltage requirement of step-down switching
regulators becomes lower, V_IN to V_OUT step-down ratio
increases, and load transients become faster, a major
challenge is to limit the overshoot in V_OUT during a fast
load current drop, or “load-release” transient.
Inductor current slew rate di_L/dt = V_L/L is proportional
to voltage across the inductor V_L = V_SW – V_OUT. When
the top MOSFET is turned on, V_L = V_IN – V_OUT, inductor
current ramps up. When bottom MOSFET turns on, V_L =
V_SW – V_OUT = –V_OUT, inductor current ramps down. At
very low V_OUT, the low differential voltage, V_L, across the
inductor during the ramp down makes the slew rate of the
inductor current much slower than needed to follow the
load current change. The excess inductor current charges
up the output capacitor, which causes overshoot at V_OUT.
If the bottom MOSFET could be turned off during the load-
release transient, the inductor current would flow through
the body diode of the bottom MOSFET, and the equation
can be modified to include the bottom MOSFET body
diode drop to become V_L = –(V_OUT + V_BD). Obviously the
benefit increases as the output voltage gets lower, since
V_BD would increase the sum significantly, compared to a
single V_OUT only.
The load-release overshoot at V_OUT causes the error ampli-
fier output, ITH, to drop quickly. ITH voltage is proportional
to the inductor current setpoint. A load transient will
result in a quick change of this load current setpoint, i.e.,
a negative spike of the first derivative of the ITH voltage.
The LTC3838-1 uses a detect transient (DTR) pin to
monitor the first derivative of the ITH voltage, and detect
the load-release transient. Referring to the Functional
Diagram, the DTR pin is the input of a DTR comparator,
and the internal reference voltage for the DTR comparator
is half of INTV_CC. To use this pin for transient detection,
ITH compensation needs an additional R_ITH resistor tied
to INTV_CC, and connects the junction point of ITH com-
pensation components C_ITH1, R_ITH1 and R_ITH2 to the DTR
pin as shown in the Functional Diagram. The DTR pin is
now proportional to the first derivative of the inductor
current setpoint, through the highpass filter of C_ITH1 and
(R_ITH1//R_ITH2).
The two R_ITH resistors establish a voltage divider from
INTV_CC to SGND, and bias the DC voltage on DTR pin (at
steady-state load or ITH voltage) slightly above half of
INTV_CC. Compensation performance will be identical by
using the same C_ITH1 and make R_ITH1//R_ITH2 equal the
R_ITH as used in conventional single resistor OPTI-LOOP
compensation. This will also provide the R-C time constant
needed for the DTR duration. The DTR sensitivity can be
adjusted by the DC bias voltage difference between DTR
and half INTV_CC. This difference could be set as low as
200mV, as long as the ITH ripple voltage with DC load
current does not trigger the DTR.
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