LTC3838-1_15 Datasheet, PDF (28/52 Pages) Linear Technology – Dual, Fast, Accurate Step-Down DC/DC Controller with Dual Differential Output Sensing

LTC3838-1
APPLICATIONS INFORMATION
For applications where the main input power never exceeds
5.3V, tie the DRV_CC1 and DRV_CC2 pins to the V_IN input
through a small resistor, (such as 1Ω to 2Ω) as shown
in Figure 8 to minimize the voltage drop caused by the
gate charge current. This will override the LDO and will
prevent DRV_CC from dropping too low due to the dropout
voltage. Make sure the DRV_CC voltage exceeds the R_DS(ON)
test voltage for the external MOSFET which is typically at
4.5V for logic-level devices.
LTC3838-1
DRV_CC2
DRV_CC1
R_DRVCC
C_DRVCC
V_IN
C_IN
pins are pulled below the ~0.8V threshold, the part will
shut down all bias of INTV_CC and DRV_CC and be put in
micropower shutdown mode.
The RUN pins’ bias currents depend on the RUN voltages.
The bias current changes should be taken into account
when designing the external voltage divider UVLO circuit.
An internal proportional-to-absolute-temperature (PTAT)
pull-up current source (~1.2µA at 25°C) is constantly con-
nected to this pin. When a RUN pin rises above 1.2V, the
corresponding channel’s TG and BG drives are turned on
and an additional  5µA temperature-independent pull-up
current is connected internally to the RUN pin. Pulling the
RUN pin to fall below 1.2V by more than an 80mV hyster-
esis turns off TG and BG of the corresponding channel,
and the additional 5µA pull-up current is disconnected.
38381 F08
Figure 8. Setup for V_IN ≤ 5.3V
Input Undervoltage Lockout (UVLO)
As voltage on a RUN pin increases, typically beyond 3V,
its bias current will start to reverse direction and flow into
the RUN pin. Keep in mind that neither of the RUN pins
can sink more than 50µA; Even if a RUN pin may slightly
exceed 6V when sinking 50µA, a RUN pin should never
be forced to higher than 6V by a low impedance voltage
source to prevent faulty conditions.
The LTC3838-1 has two functions that help protect the
controller in case of input undervoltage conditions. An
internal UVLO comparator constantly monitors the INTV_CC
and DRV_CC voltages to ensure that adequate voltages are
present. The comparator enables internal UVLO signal,
which locks out the switching action of both channels, until
the INTV_CC and DR_VCC1,2 pins are all above their respective
UVLO thresholds. The rising threshold (to release UVLO)
of the INTV_CC is typically 4.2V, with 0.5V falling hysteresis
(to re-enable UVLO). The UVLO thresholds for DR_VCC1,2 are
lower than that of INTV_CC but higher than typical threshold
voltages of power MOSFETs, to prevent them from turning
on without sufficient gate drive voltages.
Generally for V_IN > 6V, a UVLO can be set through moni-
toring the V_IN supply by using external voltage dividers
at the RUN pins from V_IN to SGND. To design the volt-
age divider, note that both RUN pins have two levels
of threshold voltages. The precision gate-drive-enable
threshold voltage of 1.2V can be used to set a V_IN to turn
on a channel’s switching. If resistor dividers are used on
both RUN pins, when V_IN is low enough and both RUN
Soft-Start and Tracking
The LTC3838-1 has the ability to either soft-start by itself
with a capacitor or track the output of another channel or
an external supply. Note that the soft-start and tracking
features are achieved not by limiting the maximum output
current of the controller, but by controlling the output ramp
voltage according to the ramp rate on the TRACK/SS pin.
When a channel is configured to soft-start by itself, a ca-
pacitor should be connected to its TRACK/SS pin. TRACK/
SS is pulled low until the RUN pin voltage exceeds 1.2V
and UVLO is released, at which point an internal current
of 1µA charges the soft-start capacitor, C_SS, connected
to the TRACK/SS pin. Current-limit foldback is disabled
during this phase to ensure smooth soft-start or track-
ing. The soft-start or tracking range is defined to be the
voltage range from 0V to 0.6V on the TRACK/SS pin. The
total soft-start time can be calculated as:
t_SS(SEC)
=
0.6(V)
•
C_SS(µF)
1(µA)
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