LTC3838-1_15 Datasheet, PDF (3/52 Pages) Linear Technology – Dual, Fast, Accurate Step-Down DC/DC Controller with Dual Differential Output Sensing

LTC3838-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T_A = 25°C. V_IN = 15V unless otherwise noted (Note 3).
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Main Control Loops
V_IN
Input Voltage Operating Range
4.5
38
V
V_OUT1,2
Regulated Output Voltage Operating Range
RVD^Oeif^Usfep^T_r¹eecRntteitagolulVyla_OwtU^ei_T^dth_S^D_ERN^if_SefEse1pre^–_{e,ncVttiaOtolU}^ly_TV2^w_DR_F^it_Beh₂g_–ulated
0.6
5.5
V
I_Q
Input DC Supply Current
Both Channels Enabled
Only One Channel Enabled
Shutdown Supply Current
MODE/PLLIN = 0V, No Load
RUN1 or RUN2 (But Not Both) = 0V
RUN1 = RUN2 = 0V
3
mA
2
mA
15
µA
V_FB1
Regulated Feedback Voltage on Channel 1
(V_OUTSENSE1+ – V_{OUTSENSE1–})
ITH1 = 1.2V, V_{OUTSENSE1–} = 0V (Note 5)
T_A = 25°C
0.5985 0.6 0.6015
V
T_A = 0°C to 85°C
l 0.596 0.6 0.604
V
T_A = –40°C to 125°C
l 0.594 0.6 0.606
V
Regulated Feedback Voltage on Channel 1 Over
Line, Load and Common Mode
V–0_{IN.5=V4<.5VVO}t_Uo_TS3_E8_NV_S,_EI₁T_–H<10=.50V.5(VNotote15.9) V,
T_A = 0°C to 85°C
l 0.594 0.6 0.606
V
T_A
–0.2V
=
<
–40°C to 125°C
V_{OUTSENSE1–} < 0.2V
l 0.591 0.6 0.609
V
T_A = 0°C to 85°C
l 0.5955 0.6 0.6045
V
T_A = –40°C to 125°C
l 0.594 0.6 0.606
V
V_FB2
Regulated Feedback Voltage on Channel 2
(2 • V_DFB2+ – V_DFB2–)
ITH2 = 1.2V, V_DFB2– = 0V (Note 5)
T_A = 25°C
T_A = 0°C to 85°C
T_A = –40°C to 125°C
0.598 0.6 0.602
V
l 0.5955 0.6 0.6045
V
l 0.594 0.6 0.606
V
Regulated Feedback Voltage on Channel 2 Over
Line, Load and Common Mode
I_VOUTSENSE1+
I_{VOUTSENSE1–}
I_VDFB2+
I_VDFB2–
V_OUTSENSE1+ Input Bias Current
V_{OUTSENSE1–} Input Bias Current
V_DFB2+ Input Bias Current
V_DFB2– Input Bias Current
V–0_{IN.2=V4<.5VVD}t_Fo_B23_–8<V,0I.T2HV2(N=o0te.55V)to 1.9V,
T_A = 0°C to 85°C
T_A = –40°C to 125°C
V_OUTSENSE1+ = 0.6V, V_{OUTSENSE1–} = 0V
V_OUTSENSE1+ = 0.6V, V_{OUTSENSE1–} = 0V
V_DFB2+ = 0.3V, V_DFB2– = 0V
V_DFB2+ = 0.3V, V_DFB2– = 0V
l 0.5955 0.6 0.6045
V
l 0.594 0.6 0.606
V
0 ±25
nA
–25 –50
µA
0 ±25
nA
–6 –12
µA
g_m(EA)1,2
Error Amplifier Transconductance (∆I_TH1,2/∆V_FB1,2) ITH = 1.2V (Note 5)
1.7
mS
t_ON(MIN)1,2 Minimum Top Gate On-Time
V_IN = 38V, V_OUT = 0.6V, R_T = 20k (Note 6)
30
ns
t_OFF(MIN)1,2 Minimum Top Gate Off-Time
(Note 6)
90
ns
Current Sensing
V_{SENSE(MAX)1,2}
Maximum Valley Current Sense Threshold
(V_SENSE1,2+ – V_{SENSE1,2–})
V_{SENSE(MIN)1,2}
Minimum Valley Current Sense Threshold
(V_SENSE1,2+ – V_{SENSE1,2–})
(Forced Continuous Mode)
V_RNG
V_RNG
=
=
0V, V_FB
INTV_CC,
=V_F0_B.5=70V.,5V7_{SVE,NVSSE–EN}=_SE2_–.5=V2.5V
l
l
24
54
30
61
36
69
mV
mV
V_RNG
V_RNG
=
=
0V, V_FB
INTV_CC,
=V_F0_B.6=30V.,6V3_{SVE,NVSSE–EN}=_SE2_–.5=V2.5V
–15
mV
–30
mV
I_SENSE1,2+
I_{SENSE1,2–}
SENSE1,2⁺ Pins Input Bias Current
SENSE1,2^– Pins Input Bias Current (Internal 500k
Resistor to SGND)
VV_SSEENNSSEE++
=
=
0.6V
5V
VV_{SSEENNSSEE––}
=
=
0.6V
5V
±5 ±50
nA
1
±2
µA
1.2
µA
10
µA
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