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LTC3735 Datasheet, PDF (22/32 Pages) Linear Technology – 2-Phase, High Efficiency DC/DC Controller for Intel Mobile CPUs
LTC3735
APPLICATIONS INFORMATION
Rewriting this equation, we can estimate the RAVP value
to be:
RAVP≅
35.5 •R3
m •| AVP| – 1
(12)
RSENSE
Typically the calculation results based on these equations
have ±10% tolerance. So the resistor values need to be
fine tuned.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3735 circuits: 1) I2R losses, 2) Topside
MOSFET transition losses, 3) PVCC supply current and
4) CIN loss.
1) I2R losses are predicted from the DC resistances of
the fuse (if used), MOSFET, inductor, and current sense
resistor. In continuous mode the average output current
flows through L and RSENSE, but is “chopped” between the
topside MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same RDS(ON), then the
resistance of one MOSFET can simply be summed with
the resistances of L, RSENSE and ESR to obtain I2R losses.
For example, if each RDS(ON) = 10mΩ, RL = 10mΩ, and
RSENSE = ­5mΩ, then the total resistance is 25mΩ. This
results in losses ranging from 2% to 8% as the output
current increases from 3A to 15A per output stage for a 5V
output, or a 3% to 12% loss per output stage for a 3.3V
output. Efficiency varies as the inverse square of VOUT for
the same external components and output power level.
The combined effects of increasingly lower output voltages
and higher currents required by high performance digital
systems is not doubling but quadrupling the importance
of loss terms in the switching regulator system!
2) Transition losses apply only to the topside MOSFET(s),
and are significant only when operating at high input volt-
ages (typically 12V or greater). Transition losses can be
estimated from:
Transition Loss =
per Phase
VI2N • IOUT
4
• f • CRSS • RDR •

1
1


VDR
–
VTH(MIN)
+
VTH(MIN)


3) PVCC drives both top and bottom MOSFETs. The MOSFET
driver current results from switching the gate capacitance
of the power MOSFETs. Each time a MOSFET gate is
switched from low to high to low again, a packet of charge
dQ moves from PVCC to ground. The resulting dQ/dt is a
current out of PVCC that is typically much larger than the
control circuit current. In continuous mode, IGATECHG =
(QT + QB)f, where QT and QB are the gate charges of the
topside and bottom side MOSFETs and f is the switching
frequency.
4) The input capacitor has the difficult job of filtering
the large RMS input current to the regulator. It must
have a very low ESR to minimize the AC I2R loss and
sufficient capacitance to prevent the RMS current from
causing additional upstream losses in fuses or batteries.
The LTC3735 2-phase architecture typically halves the
input and output capacitor requirements over 1-phase
solutions.
Other losses, including COUT ESR loss, Schottky diode
conduction loss during dead time, inductor core loss and
internal control circuitry supply current generally account
for less than 2% additional loss.
Checking Transient Response
The regulator loop response can be checked by look-
ing at the load transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
3735fa
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