LTC3735 Datasheet, PDF (21/32 Pages) Linear Technology – 2-Phase, High Efficiency DC/DC Controller for Intel Mobile CPUs

LTC3735
APPLICATIONS INFORMATION
Minimum On-Time Considerations
Minimum on-time, t_ON(MIN), is the smallest time duration
that the LTC3735 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn on the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that:
( ) ^tON(MIN)
<
V_OUT
V_IN f
If the duty cycle falls below what can be accommodated
by the minimum on-time, the LTC3735 will begin to skip
cycles resulting in variable frequency operation. The output
voltage will continue to be regulated, but the ripple current
and ripple voltage will increase.
The minimum on-time for the LTC3735 is generally less
than 150ns. However, as the peak sense voltage decreases,
the minimum on-time gradually increases. This is of par-
ticular concern in forced continuous applications with low
ripple current at light loads. If the duty cycle drops below
the minimum on-time limit in this situation, a significant
amount of cycle skipping can occur with correspondingly
larger ripple current and ripple voltage.
If an application can operate close to the minimum
on-time limit, an inductor must be chosen that has a low
enough inductance to provide sufficient ripple amplitude
to meet the minimum on-time requirement. As a general
rule, keep the inductor ripple current of each phase equal
to or greater than 15% of I_OUT(MAX) at V_IN(MAX).
Active Voltage Positioning
Active voltage positioning can be used to minimize peak-to-
peak output voltage excursion under worst-case transient
loading conditions. The open-loop DC gain of the control
loop is reduced depending upon the maximum load step
specifications. Active voltage positioning can easily be
added to the LTC3735. Figure 9 shows the equivalent circuit
for implementing AVP. The load line slope is estimated to be:
AVP ≅
–35.5 • ^RSENSE
m
• ^R3
R_AVP
,
(9)
if
g_m
•
R3
>
10
•
V_OUT
0.6V
where R_SENSE is the current sense resistor, m is the number
of phases, (m = 2 for LTC3735) R3 and R_AVP are defined
in Figure 9. g_m is the transconductance gain for the error
amplifier, it is about 4.5mmho for LTC3735. Rewriting
Equation 9 we can estimate the AVP resistor to be:
R_AVP
≅
35.5 •R3 •R_SENSE
m•| AVP|
(10)
V_OUT+
R3
R_AVP
V_OA+
+
R2
V_OA–
–
R1
OAOUT
FB _–
VID
I_TH
0.6V +
3735 F09
Figure 9. Simplified Schematic Diagram
for AVP Design in LTC3735
We also adopt the current sense resistors as part of
voltage positioning slopes. So the total load line slope is
estimated to be:
AVP ≅ –35.5 • ^RSENSE • ^R3 – ^RSENSE ,
m R_AVP
m
(11)
if
g_m
•
R3
>>
V_OUT
0.6V
3735fa
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