LTC3735 Datasheet, PDF (15/32 Pages) Linear Technology – 2-Phase, High Efficiency DC/DC Controller for Intel Mobile CPUs

LTC3735
APPLICATIONS INFORMATION
MOSFET while a higher R_DS(ON) but lower Q_G and C_RSS
part would be desirable for the top MOSFET.
The Schottky diodes, D1 and D2 in Figure 1 conduct dur-
ing the dead-time between the conduction of the top and
bottom MOSFETs. This helps reduce the current flowing
through the body diode of the bottom MOSFET. A body
diode usually has a forward conduction voltage higher than
that of a Schottky and is thus detrimental to efficiency. The
charge storage and reverse recovery of a body diode also
cause high frequency rings at the switching nodes (the
conjunction nodes between the top and bottom MOSFETs),
which are again not desired for efficiency or EMI. Some
power MOSFET manufacturers integrate a Schottky diode
with a power MOSFET, eliminating the need to parallel an
external Schottky. These integrated Schottky-MOSFETs,
however, have smaller MOSFET die sizes than conventional
parts and are thus not suitable for high current applications.
C_IN and C_OUT Selection
In continuous mode, the source current of each top
N‑channel MOSFET is a square wave of duty cycle V_OUT/
V_IN. A low ESR input capacitor sized for the maximum
RMS current must be used. The details of a closed form
equation can be found in Linear Technology Application
Note 77. Figure 4 shows the input capacitor ripple current
for a 2-phase configuration with the output voltage fixed
and input voltage varied. The input ripple current is nor-
malized against the DC output current. The graph can be
used in place of tedious calculations. The minimum input
ripple current can be achieved when the input voltage is
twice the output voltage.
In the graph of Figure 4, the 2-phase local maximum input
RMS capacitor currents are reached when:
V_OUT
V_IN
=
2k − 1
4
where k = 1, 2
These worst-case conditions are commonly used for
design, considering input/output variations and long
term reliability. Note that capacitor manufacturer’s ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor,
or to choose a capacitor rated at a higher temperature
than required. Several capacitors may also be paral-
leled to meet size or height requirements in the design.
Always consult the capacitor manufacturer if there is any
question.
0.6
1-PHASE
2-PHASE
0.5
0.4
0.3
0.2
0.1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
DUTY FACTOR (V_OUT/V_IN)
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Figure 4. Normalized RMS Input Ripple Current
vs Duty Factor for 1 and 2 Output Stages
It is important to note that the efficiency loss is propor-
tional to the input RMS current squared and therefore a
2‑phase implementation results in 75% less power loss
when compared to a single phase design. Battery/input
protection fuse resistance (if used), PC board trace and
connector resistance losses are also reduced by the reduc-
tion of the input ripple current in a 2-phase system. The
required amount of input capacitance is further reduced
by the factor, 2, due to the reduction in input RMS current.
The selection of C_OUT is driven by the required effective
series resistance (ESR). Typically once the ESR require-
ment has been met, the RMS current rating generally far
exceeds the I_RIPPLE(P-P) requirements. The steady state
output ripple (∆V_OUT) is determined by:
∆V_OUT
≈
∆I_RIPPLE

 ^ESR
+
16
•
f
1
• C_OUT


where f = operating frequency of each stage, C_OUT =
output capacitance and ∆I_RIPPLE = interleaved inductor
ripple currents.
∆I_RIPPLE can be calculated from the duty factor and the
∆I_L of each stage. A closed form equation can be found in
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