LTC3735 Datasheet, PDF (12/32 Pages) Linear Technology – 2-Phase, High Efficiency DC/DC Controller for Intel Mobile CPUs

LTC3735
APPLICATIONS INFORMATION
The basic LTC3735 application circuit is shown in
Figure 1 on the first page of this data sheet. External com-
ponent selection begins with the selection of the inductors
based on ripple current requirements and continues with
the current sensing resistors using the calculated peak
inductor current and/or maximum current limit. Next, the
power MOSFETs, D1 and D2 are selected. The operating
frequency and the inductor are chosen based mainly on
the amount of ripple current. Finally, C_IN is selected for its
ability to handle the input ripple current (that PolyPhase^®
operation minimizes) and C_OUT is chosen with low enough
ESR to meet the output ripple voltage and load step
specifications (also minimized with PolyPhase). Current
mode architecture provides inherent current sharing be-
tween output stages. The circuit shown in Figure 1 can
be configured for operation up to an input voltage of 28V
(limited by the external MOSFETs). Current mode control
allows the ability to connect the two output stages to two
different input power supply rails. A heavy output load
can take some power from each input supply according
to the selection of the R_SENSE resistors.
R_SENSE Selection For Output Current
R_SENSE1,2 are chosen based on the required peak output
current. The LTC3735 current comparator has a maximum
threshold of 72mV/R_SENSE and an input common mode
range of SGND to PV_CC. The current comparator threshold
sets the peak inductor current, yielding a maximum aver-
age output current I_MAX equal to the peak value less half
the peak-to-peak ripple current, ∆I_L.
Assuming a common input power source for each out-
put stage and allowing a margin for variations in the
LTC3735 and external component values yields:
R_SENSE = 2(40mV/I_MAX)
Operating Frequency
The LTC3735 uses a constant frequency architecture with
the frequency determined by an internal capacitor. This
capacitor is charged by a fixed current plus an additional
current which is proportional to the DC voltage applied
to the FREQSET pin. The FREQSET voltage is internally
set to 1.2V. It is recommended that this pin is actively
12
biased with a resistor divider to prevent noise getting
into the system.
A graph for the voltage applied to the FREQSET pin vs fre-
quency is given in Figure 2. As the operating frequency is
increased the gate drive and switching losses will be higher,
reducing efficiency (see Efficiency Considerations). The
maximum switching frequency is approximately 550kHz.
600
550
500
450
400
350
300
250
200
150
100
0
0.5 1.0 1.5 2.0 2.5 3.0
FREQSET PIN VOLTAGE (V)
3735 F02
Figure 2. Operating Frequency vs V_FREQSET
Inductor Value Calculation and Output Ripple Current
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because
MOSFET gate charge and transition losses increase
directly with frequency. In addition to this basic tradeoff,
the effect of inductor value on ripple current and low cur-
rent operation must also be considered. The PolyPhase
approach reduces both input and output ripple currents
while optimizing individual output stages to run at a lower
fundamental frequency, enhancing efficiency.
The inductor value has a direct effect on ripple current.
The inductor ripple current ∆I_L, decreases with higher
inductance or frequency and increases with higher V_IN:
∆I_L
=
V_OUT
fL


1−
V_OUT
V_IN


where f is the individual output stage operating frequency.
3735fa