IS66WVD2M16DALL Datasheet, PDF (26/52 Pages) Integrated Silicon Solution, Inc – Single device supports asynchronous and burst operation

IS66WVD2M16DALL
Refresh Configuration Register
The refresh configuration register (RCR) defines how the CellularRAM device performs
its transparent self refresh. Altering the refresh parameters can dramatically reduce
current consumption during standby mode. Table 8 describes the control bits used in
the RCR.
The RCR is accessed using CRE and A[19:18] = 00b, or through the configuration
register software access sequence with ADQ = 0000h on the third cycle (see “Registers”)
Table 8. Refresh Configuration Register
Bit Number
20
19 – 18
17 – 7
6–5
4
3
2–0
Definition
Reserved
Register Select
Reserved
Reserved
DPD
Reserved
Partial Refresh
Must be set to “0”
00 = Select RCR
01 = Select DIDR
10 = Select BCR
Must be set to “0”
Setting is ignored
0 = DPD enable
1 = DPD disable (default)
Must be set to “0”
000 = Full array (default)
001 = Bottom 1/2 array
010 = Bottom 1/4 array
011 = Bottom 1/8 array
100 = None of array
101 = Top 1/2 array
110 = Top 1/4 array
111 = Top 1/8 array
Remark
Rev. A | May 2012
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