IS66WVC1M16ALL Datasheet, PDF (26/67 Pages) Integrated Silicon Solution, Inc – Mixed Mode supports asynchronous write and synchronous read operation

IS66WVC1M16ALL
IS67WVC1M16ALL
Table 7. Fixed Latency Configuration Codes (BCR[14] = 1)
BCR
[13:11]
010
011
100
101
110
000
others
Latency
Configuration
Code
2 (3 clocks)
3 (4 clocks)-default
4 (5 clocks)
5 (6 clocks)
6 (7 clocks)
8 (9 clocks)
Reserved
Latency
Count (N)
2
3
4
5
6
8
-
Max Input CLK Frequency (MHz)
-75
33 (30ns)
52 (19.2ns)
66 (15ns)
75 (13.3ns)
104 (9.62ns)
133 (7.5ns)
-
-96
33 (30ns)
52 (19.2ns)
66 (15.0ns)
75 (13.3ns)
104 (9.62ns)
-
-
-12
25 (40ns)
40 (25ns)
52 (19.2ns)
66 (15.0ns)
80 (12.5ns)
-
-
Figure 15. Latency Counter (Fixed Latency)
CLK
Cycle N
ADV#
t_AADV
CE#
t_CO
A[19:0]
t_AA
VALID
ADDRESS
DQ0-
DQ15
(READ)
DQ0-
DQ15
(WRITE)
Burst Identified
(ADV#=LOW)
VALID
OUTPUT
VALID
INPUT
VALID
OUTPUT
VALID
INPUT
VALID
OUTPUT
VALID
INPUT
Operating Mode (BCR[15]) Default = Synchronous Operation
The operating mode bit selects either synchronous burst operation or the default asynchronous
mode of operation
Rev.A | October 2013
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