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ISL78420_15 Datasheet, PDF (8/18 Pages) Intersil Corporation – 100V, 2A Peak, Half-Bridge Driver with Tri-Level PWM Input and Adjustable Dead-Time
ISL78420
Typical Performance Curves Unless otherwise specified, operating conditions at: T = +25°C; VDD = EN = 12V;
VSS = HS = 0V; Capacitor from HB to HS pin CBOOT = 0.47µF; 100kΩ load on LO and HO to VSS. (Continued)
4.0
1E-1
3.5
VDD = 10V
3.0
VDD = 12V
2.5
2.0
1.5
1.0
-50 -25
VDD = 14V
SOURCE and SINK
100mA LOAD
2ms PULSE at 1% DUTY CYCLE
0
25 50 75 100 125 150
TEMPERATURE (°C)
FIGURE 9. HO and LO PIN OUTPUT IMPEDANCE vs TEMPERATURE
1E-2
1E-3
T = +125°C
1E-4
1E-5
T = +85°C T = +25°C
T = -40°C
1E-6
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
FORWARD VOLTAGE (V)
FIGURE 10. BOOTSTRAP DIODE I-V CHARACTERISTICS
500
100mA SOURCING
450 VOLTAGE BELOW HB FOR HO
VOLTAGE BELOW VDD FOR LO
400
VDD = 8V
350
300
250
VDD = 12V
200
150
VDD = 14V
100
-50
0
50
100
150
TEMPERATURE (°C)
FIGURE 11. OUTPUT HIGH (VOH) VOLTAGE vs TEMPERATURE
500
450
100mA SINKING
VOLTAGE ABOVE VSS
400
VDD = 8V
350
300
250
VDD = 12V
200
150
VDD = 14V
100
-50
0
50
100
150
TEMPERATURE (°C)
FIGURE 12. OUTPUT LOW (VOL) VOLTAGE vs TEMPERATURE
2.5
LO
2.0
1.5
HO
1.0
0.5
CBOOT = 10µF
1µF CAPACITIVE LOAD
0
0
2
4
6
8
10
12
VOLTAGE AT LO and HO PIN (V)
FIGURE 13. PEAK PULL-DOWN CURRENT vs OUTPUT VOLTAGE
2.5
2.0
LO
1.5
HO
1.0
0.5
CBOOT = 10µF
1µF CAPACITIVE LOAD
0
0
2
4
6
8
10
12
VOLTAGE AT LO AND HO PIN (V)
FIGURE 14. PEAK PULL-UP CURRENT vs OUTPUT VOLTAGE
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8
FN8296.3
November 6, 2014