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ISL78420_15 Datasheet, PDF (6/18 Pages) Intersil Corporation – 100V, 2A Peak, Half-Bridge Driver with Tri-Level PWM Input and Adjustable Dead-Time
ISL78420
Switching Specifications VDD = VHB = 12V, VSS = VHS = 0V, PWM = 0V to 12V, RDT = 8kΩ or 80kΩ. No Load on LO or HO, unless
otherwise specified. Boldface limits apply across the operating temperature range, -40°C to +125°C.
PARAMETERS
SYMBOL
TEST
CONDITIONS
TJ = +25°C
MIN TYP MAX
TJ = -40°C to +125°C
MIN
MAX
(Note 10) (Note 10)
UNITS
HO Turn-Off Propagation Delay
PWM Falling to HO Falling
tPHO
-
32 50
-
60
ns
LO Turn-Off Propagation Delay
PWM Rising to LO Falling
tPLO
-
32 50
-
60
ns
Minimum Dead-time Delay (Note 11)
HO Falling to LO Rising
tDTHL_min RDT = 80kΩ,
15 34 50
10
PWM High to Low
60
ns
Minimum Dead-time Delay (Note 11)
LO Falling to HO Rising
tDTLH_min RDT = 80kΩ
15 27 50
10
PWM Low to High
60
ns
Maximum Dead-time Delay (Note 11)
HO Falling to LO Rising
tDTHL_max RDT = 8kΩ,
150 220 300
-
PWM High to Low
-
ns
Maximum Dead-time Delay (Note 11)
LO Falling to HO Rising
tDTLH_max RDT = 8kΩ,
150 220 300
-
PWM Low to High
-
ns
Dead-time Delay Matching (Note 11)
|tDTHL-tDTLH|
Either Output Rise/Fall Time
(10% to 90%/90% to 10%)
tMATCH_min RDT = 80kΩ
tMATCH_max RDT = 8kΩ
tR,tF
CL = 1nF
-
7
17
-
-
10 50
-
-
10
-
-
-
ns
-
ns
-
ns
Bootstrap Diode Turn-on or Turn-off Time
tBS
-
10
-
-
-
ns
NOTES:
10. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits are established by
characterization and are not production tested.
11. Dead Time is defined as the time between LO falling and HO rising or between HO falling and LO rising. See Timing Diagram below for measurement
specification.
Timing Diagram
VPWMH
PWM
V M ID L
tPLO
RISE AND FALL TRANSITIONS OF THE PWM INPUTS ARE
tPHO
EXAGGERATED TO CLEARLY ILLUSTRATE THE LOW , MID,
AND HIGH THRESHOLD LEVELS.
V M IDH
VPWML
PWM
HO
HO
LO
LO
tDTLH
tDTHL
EN
EN
tDTLH: Dead Time Delay from LO falling to HO rising. Measured from 50% of LO to 50% of HO.
tDTHL: Dead Time Delay from HO falling to LO rising. Measured from 50% of HO to 50% of LO.
tPLO: Propagation Delay from PWM rising to LO falling. Measured from VMIDL to 50% of LO.
tPHO: Propagation Delay from PWM falling to HO falling. Measured from VMIDH to 50% of HO.
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6
FN8296.3
November 6, 2014