ISL78420_15 Datasheet, PDF (2/18 Pages) Intersil Corporation – 100V, 2A Peak, Half-Bridge Driver with Tri-Level PWM Input and Adjustable Dead-Time

Block Diagram
ISL78420
VDD
HB
BOOT
DIODE
UNDER
LEVEL
HO
VOLTAGE
SHIFT
HS
6.1V
PWM
EN
RDT
-
+
-
+
210k
DELAY
DELAY
UNDER
VOLTAGE
LO
VSS
ISOLATED
ISL78420
EPAD
Pin Configurations
ISL78420ARTAZ
(10 LD 4x4 TDFN)
TOP VIEW
VDD 1
10 LO
NOT
NC 2
R^{HHOBECO34MMENDEPEADD}
HS 5
FOR
N^{9EWVSDSESIGNS}
8 PWM
7 EN
6 RDT
NC 1
NC 2
HB 3
HO 4
HS 5
NC 6
NC 7
(14 LD TSSOP)
TOP VIEW
EPAD
14 VDD
13 LO
12 VSS
11 PWM
10 EN
9 RDT
8 NC
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2
FN8296.3
November 6, 2014