ISL6264 Datasheet, PDF (7/24 Pages) Intersil Corporation – Two-Phase Core Controller for AMD Mobile Turion CPUs

ISL6264
PVCC
5V power supply for gate drivers.
LGATE1
Lower-side MOSFET gate signal for phase 1.
PGND1
The return path of the lower gate driver for phase 1.
PHASE1
The phase node of phase 1. This pin should connect to the
source of upper MOSFET. It is the return path for the upper
MOSFET drive.
UGATE1
Upper MOSFET gate signal for phase 1.
BOOT1
This pin is the upper gate driver supply voltage for phase 1.
An internal boot strap diode is connected to the PVCC pin.
VID0, VID1, VID2, VID3, VID4, VID5
VID input with VID0 is the least significant bit (LSB) and
VID5 is the most significant bit (MSB).
VR_ON
A high level logic signal on this pin enables the ISL6264.
PSI_L
Sleeper mode indicator. When asserted low, ISL6264
initiates the single-phase operation.
PGOOD
Power good open-drain output. Will be pulled up externally
by a resistor to Vccp or 3.3V.
7
FN6359.1
October 16, 2006