ISL6264 Datasheet, PDF (5/24 Pages) Intersil Corporation – Two-Phase Core Controller for AMD Mobile Turion CPUs

ISL6264
Electrical Specifications VDD = 5V, TA = -10°C to +100°C, Unless Otherwise Specified. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNITS
LOGIC INPUTS
V_IL(3.3V)
V_IH(3.3V)
I_IL(3.3V)
I_IL(3.3V)
V_IL(3.3V)
V_IH(3.3V)
I_IL(3.3V)
I_IL(3.3V)
V_IL(1.0V)
VR_ON
VR_ON
Leakage current of VR_ON
SET
SET
Leakage current of SET
DAC(VID0-VID5) and PSI_L input
low
Logic input is low
Logic input is high at 3.3V
Logic input is low
Logic input is high at 3.3V
-
-
1
V
2.3
-
-
V
-1
0
-
µA
-
0
1
µA
-
-
1
V
2.3
-
-
V
-1
0
-
µA
- 0.45 1
µA
-
-
0.3
V
V_IH(1.0V)
I_IL(1V)
DAC(VID0-VID5), PSI_L input high
Leakage current of DAC(VID0-VID5) Logic input is low
and PSI_L
Logic input is high at 1V
0.7
-
-
V
-1
0
-
µA
- 0.45 1
µA
NOTES:
3. Guaranteed by design.
4. Guaranteed by characterization.
ISL6264 Gate Driver Timing Diagram
PWM
UGATE
t_PDHU
t_RU
LGATE
1V
t_FL
t_FU
1V
t_PDHL
t_RL
5
FN6359.1
October 16, 2006