ISL6264 Datasheet, PDF (20/24 Pages) Intersil Corporation – Two-Phase Core Controller for AMD Mobile Turion CPUs

ISL6264
10µA
OC
-
+
INTERNAL TO
ISL6264
+
1
+
-
S
+
1
+
-
VD IFF
RTN
OC SE T
VSUM
+
DROOP
-
DFB
DR OOP
VSEN VO'
VS UM
RS_EQV
=
R_-----S_---
2
+
Vdcr_EQV
=
I_OUT
×
D_-----C_-----R_---
2
VN
Rn = -⁽--^R-----ⁿ----^t--^c----+-----^R-----^s---^e----^r---ⁱ-^e----^s----⁾---^×-----^R-----^p----^a---^r-
-
(Rntc + Rseries) + Rpar
VO '
RO_EQV
=
R_-----O_---
2
FIGURE 32. SIMPLIFIED SCHEMATIC FOR DROOP AND DIE SENSING WITH INDUCTOR DCR CURRENT SENSING
Setting the Switching Frequency - FSET
The R3 modulator scheme is not a fixed frequency PWM
architecture. The switching frequency can increase during
the application of a load to improve transient performance.
It also varies slightly due changes in input and output voltage
and output current, but this variation is normally less than
10% in continuous conduction mode.
Refer to Figure 2. The resistor connected between the VW
and COMP pins of the ISL6264 adjusts the switching
window, and therefore adjusts the switching frequency. The
RFSET resistor that sets up the switching frequency of the
converter operating in CCM can be determined using the
following relationship, where RFSET is in kΩ and the
switching period is in µs. 6.81kΩ sets about 300kHz
switching frequency.
R_FSET(kΩ) ∼ (period(µs) – 0.4) ⋅ 2.33
(EQ. 5)
In discontinuous conduction mode (DCM), the ISL6264 runs
into period stretching mode. The switching frequency is
dependent on the load current level. In general, the lighter
load, the slower switching frequency. Therefore, the
switching loss is much reduced for the light load operation,
which is important for conserving the battery power in the
portable application.
Static Mode of Operation - Static Droop Using DCR
Sensing
As previously mentioned, the ISL6264 has an internal
differential amplifier which provides very accurate voltage
regulation at the die of the processor. The load line
regulation is also accurate for both two-phase and
single-phase operation. The process of selecting the
components for the appropriate load line droop is explained
here.
For DCR sensing, the process of compensation for DCR
resistance variation to achieve the desired load line droop
has several steps and is somewhat iterative.
The two-phase solution using DCR sensing is shown in
Figure 31. There are two resistors connecting to the
terminals of inductor of each phase. These are labeled RS
and R_O. These resistors are used to obtain the DC voltage
drop across each inductor. Each inductor will have a certain
level of DC current flowing through it, and this current when
multiplied by the DCR of the inductor creates a small DC
voltage drop across the inductor terminal. When this voltage
is summed with the other channels DC voltages, the total DC
load current can be derived.
R_O is typically 1Ω to 10Ω. This resistor is used to tie the
outputs of all channels together and thus create a summed
average of the local CORE voltage output. R_S is determined
through an understanding of both the DC and transient load
currents. This value will be covered in the next section.
However, it is important to keep in mind that the output of
each of these R_S resistors are tied together to create the
VSUM voltage node. With both the outputs of R_O and R_S tied
together, the simplified model for the droop circuit can be
derived. This is presented in Figure 32.
Essentially one resistor can replace the R_O resistors of each
phase and one R_S resistor can replace the R_S resistors of
each phase. The total DCR drop due to load current can be
replaced by a DC source, the value of which is given by:
V_{DCR_EQU}
=
-^I-^O-----^U----^T-----^â‹---^D-----^C----^R---
2
(EQ. 6)
For the convenience of analysis, the NTC network
comprised of R_ntc, R_series and R_par, given in Figure 31, is
labelled as a single resistor R_n in Figure 32.
The first step in droop load line compensation is to adjust R_n,
R_OEQV and R_SEQV such that sufficient droop voltage exists
20
FN6359.1
October 16, 2006