ISL6264 Datasheet, PDF (18/24 Pages) Intersil Corporation – Two-Phase Core Controller for AMD Mobile Turion CPUs

ISL6264
Undervoltage protection is independent of the overcurrent
limit. If the output voltage is less than the VID set value by
300mV or more, a fault will latch after one millisecond in that
condition. The PWM outputs will turn off and PGOOD will go
low. Note that most practical core regulators will have the
overcurrent set to trip before the -300mV undervoltage limit.
There are two levels of overvoltage protection and response.
For output voltage exceeding the set value by +200mV for
1ms, a fault is declared. All of the above faults have the
same action taken except 200mV overvoltage fault: PGOOD
is latched low and the upper and lower power FETs are
turned off so that inductor current will decay through the FET
body diodes. This condition can be reset by bringing VR_ON
low or by bringing VDD below 4V. When these inputs are
returned to their high operating levels, a soft-start will occur.
Under 200mV overvoltage fault, PGOOD is latched low but
the ISL6264 still tries to regulate the output voltage.
The second level of overvoltage protection behaves
differently. If the output exceeds 1.8V, an OV fault is
immediately declared, PGOOD is latched low and the
low-side FETs are turned on. The low-side FETs will remain
on until the output voltage is pulled down below about 0.85V
at which time all FETs are turned off. If the output again rises
above 1.7V, the protection process is repeated. This affords
the maximum amount of protection against a shorted high-
side FET while preventing output ringing below ground. The
1.8V OV is not reset with VR_ON, but requires that VDD be
lowered to reset. The 1.8V OV detector is active at all times
that the controller is enabled including after one of the other
faults occurs so that the processor is protected against high-
side FET leakage while the FETs are commanded off.
Offset Voltage
The reference voltage at OFS pin is 1.2V. A resistor (ROFS)
connecting the OFS pin to GND will setup a current flowing
out of OFS pin. This current is internally mirrored out of FB
pin. Therefore, a voltage drop is established across the
resistor between FB and VDIFF pin. For the convenience of
illustration, name the compensation network resistor
between FB and VDIFF as R_CIN.
Vo (V)
O
F
FS
E
T
≡
--¹---^.--²----^V----
R_OFS
R_C
IN
(EQ. 1)
Normally we chose RCIN as 1kΩ for the convenience of
design, then ROFS of 36.5kΩ will result in a positive
OFFSET voltage of 33mV.
Component Selection and Application
Soft-Start and VID Transition Slew Rates
The ISL6264 uses two different slew rates for start-up and
the normal operation mode. The first is a slow slew rate in
order to reduce inrush current during start-up. Note that the
SOFT cap current is bidirectional. The current is flowing into
the SOFT capacitor when the output voltage is commanded
to rise, and out of the SOFT capacitor when the output
voltage is commanded to fall.
The two slew rates are determined by commanding one of
two current sources onto the SOFT pin. As can be seen in
Figure 30, the SOFT pin has a capacitance to ground. Also,
the SOFT pin is the input to the error amplifier and is,
therefore, the commanded system voltage. Depending on
the state of the system, i.e. Start-Up or After Start-up, one of
the two currents shown in Figure 30 will be used to charge or
discharge this capacitor, thereby controlling the slew rate of
the commanded voltage. These currents can be found under
the “Soft-Start Current“ section of the Electrical Specification
Table.
ISL6264
I _SS
SOFT
I ₂ Error
Amplifier
+
C _SOFT
+
V _REF
OFFSET
VID
0
FIGURE 29. LOAD LINE AND OFFSET
Io (A)
FIGURE 30. SOFT PIN CURRENT SOURCES FOR FAST AND
SLOW SLEW RATES
The first current, labelled I_SS, is given in the Specification
Table as 43A. This current is used during Soft-Start. The
second current, I2 sums with I_SS to get the larger of the two
currents, labeled IGV in the Electrical Specification Table.
This total current is typically 210A with a minimum of 185A.
The symbol, SLEWRATE, will determine the choice of the
SOFT capacitor, CSOFT, by Equation 2:
C_SOFT
≡
----------------^I--²-----------------
SLEWRATE
(EQ. 2)
18
FN6359.1
October 16, 2006