ISL6264 Datasheet, PDF (16/24 Pages) Intersil Corporation – Two-Phase Core Controller for AMD Mobile Turion CPUs

ISL6264
TABLE 1. V_ID TABLE FOR AMD 6-BIT V_ID CPU (Continued)
VID5 VID4 VID3 VID2 VID1 VID0
VOUT
(V)
0
1
1
0
1
0
0.9000
0
1
1
0
1
1
0.8750
0
1
1
1
0
0
0.8500
0
1
1
1
0
1
0.8250
0
1
1
1
1
0
0.8000
0
1
1
1
1
1
0.7750
1
0
0
0
0
0
0.7625
1
0
0
0
0
1
0.7500
1
0
0
0
1
0
0.7375
1
0
0
0
1
1
0.7250
1
0
0
1
0
0
0.7125
1
0
0
1
0
1
0.7000
1
0
0
1
1
0
0.6875
1
0
0
1
1
1
0.6750
1
0
1
0
0
0
0.6625
1
0
1
0
0
1
0.6500
1
0
1
0
1
0
0.6375
1
0
1
0
1
1
0.6250
1
0
1
1
0
0
0.6125
1
0
1
1
0
1
0.6000
1
0
1
1
1
0
0.5875
1
0
1
1
1
1
0.5750
1
1
0
0
0
0
0.5625
1
1
0
0
0
1
0.5500
1
1
0
0
1
0
0.5375
1
1
0
0
1
1
0.5250
1
1
0
1
0
0
0.5125
1
1
0
1
0
1
0.5000
1
1
0
1
1
0
0.4875
1
1
0
1
1
1
0.4750
1
1
1
0
0
0
0.4625
1
1
1
0
0
1
0.4500
1
1
1
0
1
0
0.4375
1
1
1
0
1
1
0.4250
1
1
1
1
0
0
0.4125
1
1
1
1
0
1
0.4000
1
1
1
1
1
0
0.3875
1
1
1
1
1
1
0.3750
A fully-differential amplifier implements core voltage sensing
for precise voltage control at the microprocessor die. The
inputs to the amplifier are the VSEN and RTN pins.
As the load current increases from zero, the output voltage
will droop from the VID table value by an amount
proportional to current to achieve the proper load line. The
ISL6264 provides for current to be measured using either
resistors in series with the channel inductors as shown in the
application circuit of Figure 3, or using the intrinsic series
resistance of the inductors as shown in the application circuit
of Figure 2. In both cases signals representing the inductor
currents are summed at VSUM, which is the non-inverting
input to the DROOP amplifier shown in the block diagram of
Figure 1. The voltage at the DROOP pin minus the output
voltage, VO, is a high-bandwidth analog of the total inductor
current. This voltage is used as an input to a differential
amplifier to achieve the load line, and also as the input to the
overcurrent protection circuit.
When using inductor DCR current sensing, a single NTC
element is used to compensate the positive temperature
coefficient of the copper winding thus maintaining the
load-line accuracy.
In addition to monitoring the total current (used for DROOP
and overcurrent protection), the individual channel average
currents are also monitored and used for balancing the load
between channels. The IBAL circuit will adjust the channel
pulse-widths up or down relative to the other channel to
cause the voltages presented at the ISEN pins to be equal.
The ISL6264 controller can be configured for two-channel
operation, with the channels operating 180° apart. The
channel PWM frequency is determined by the value of
RFSET connected to pin VW as shown in Figure 2 and
Figure 3. Input and output ripple frequencies will be the
channel PWM frequency multiplied by the number of active
channels.
TABLE 2.
PSI_l = LOGIC HIGH PSI_L = LOGIC LOW
Operation
2-CCM
1-DE (diode emulation)
High Efficiency Operation Mode
The ISL6264 has two operating modes to optimize efficiency.
The controller's operational modes are designed to work in
conjunction with the PSI_L control signals to maintain the
optimal system configuration. These operating modes are
established as shown in Table 2. At high current levels, the
system will operate with both phases fully active, responding
rapidly to transients and deliver the maximum power to the
load. At reduced load current levels, one of the phases may
be idled. This configuration will minimize switching losses,
while still maintaining transient response capability. At the
lowest current levels, the controller automatically configures
the system to operate in single-phase automatic-DCM
16
FN6359.1
October 16, 2006