ISL5216_07 Datasheet, PDF (40/65 Pages) Intersil Corporation – Four-Channel Programmable Digital Downconverter

ISL5216
P(31:0)
31:29
28
27:26
25:24
23:22
21:20
19:16
15:12
11:0
TABLE 25. SERIAL DATA OUTPUT CONTROL REGISTER (IWA = *014h)
FUNCTION
Set to zero.
Sync polarity
1
Active low (low for one serial clock per word with a sync).
0
Active high.
Reserved, set to zero.
Sync position. This applies to all time slots in the serial output. The Sync programming is associated with the SD1x serial output data
stream (x = A, B, C, or D).
00
Sync is asserted during the serial clock period prior to the first data bit of the serial word (early sync).
01
Sync is asserted during the clock period following the last data bit of the word (late sync).
1X Sync is asserted during the serial clock period of the first data bit of the serial word (coincident sync).
Reserved, set to zero.
Magnitude output scale factor. The magnitude output of the cartesian to polar coordinate conversion has bits weighted as:
2^{(2 1 0.-1 -2 -3 -4 . . . )}
The gain in the conversion is 0.82338. When using 16 bits, the range is such that the LSB has a weight of 0.00007 and the maximum
output is 2.32, both after the conversion gain. This corresponds to an I/Q vector length of -83dBFS to +3dBFS. These control bits
add gain (with saturation) for more resolution at the bottom of the scale. A code of 00 passes the magnitude unchanged, 01 shifts
the magnitude up one bit position’ 10 shifts by two positions and 11 shifts up three positions. The resulting bit weights and range (after
conversion gain) for the unsigned numbers are:
Code Bit Weights
dBFS
00
2 1 0 -1 -2 . . . -11 -12 -13 +3 to -83
01
1 0 -1 -2 -3 . . . -12 -13 -14 +3 to -89
10
0 -1 -2 -3 -4 . . . -13 -14 -15 +1.7 to -95
11
-1 -2 -3 -4 -5 . . . -14 -15 -16 -4.3 to -101
The upper limits on codes 00 and 01 are the same, but 01 has no leading zero.
Serial data output SD1 routing mask. 0 disables. 1 enables.
Bit
Enabled Output
16
Enables the serial output for this channel to pin SD1A.
17
Enables the serial output for this channel to pin SD1B.
18
Enables the serial output for this channel to pin SD1C.
19
Enables the serial output for this channel to pin SD1D.
Serial data output SD2 routing mask. 0 disables. 1 enables.
Bit
Enabled Output.
12
Enables the serial output for this channel to pin SD2A.
13
Enables the serial output for this channel to pin SD2B.
14
Enables the serial output for this channel to pin SD2C.
15
Enables the serial output for this channel to pin SD2D.
Output hold-off delay. This parameter adds additional delay from the output of the filter compute engine to start of the serial output
stream for multiplexing channels. Load with the desired delay (0 = zero, 1 = one, 2 = two, etc.).
40
FN6013.3
July 13, 2007