X5043S8ZT1 Datasheet, PDF (4/21 Pages) Intersil Corporation – CPU Supervisor with 4K SPI EEPROM

X5043, X5045
Ordering Information (Continued)
PART NUMBER
RESET
(ACTIVE LOW)
PART
MARKING
PART NUMBER
RESET
(ACTIVE HIGH)
PART
MARKING
X5043P-2.7A
X5043P AN X5045P-2.7A
X5045P AN
X5043PZ-2.7A (Note) X5043P Z AN X5045PZ-2.7A (Note) X5045P Z AN
X5043PI-2.7A
X5043P AP X5045PI-2.7A
X5045P AP
X5043PIZ-2.7A (Note) X5043P Z AP X5045PIZ-2.7A (Note) X5045P Z AP
X5043S8-2.7A*
X5043 AN X5045S8-2.7A
X5045 AN
X5043S8Z-2.7A*
(Note)
X5043 Z AN X5045S8Z-2.7A
(Note)
X5045 Z AN
X5043S8I-2.7A*
X5043 AP X5045S8I-2.7A
X5045 AP
X5043S8IZ-2.7A*
(Note)
X5043 Z AP X5045S8IZ-2.7A
(Note)
X5045 Z AP
X5043M8-2.7A*
AEQ
X5045M8-2.7A
AEZ
X5043M8Z-2.7A
(Note)
DBR
X5045M8Z-2.7A
(Note)
DCA
X5043M8I-2.7A*
AER
X5045M8I-2.7A
AFA
X5043M8IZ-2.7A*
DBL
(Note)
X5045M8IZ-2.7A
(Note)
DBW
X5043V14I-2.7A
X5043V AP X5045V14I-2.7A
X5045V AP
X5043V14IZ-2.7A
(Note)
X5043V Z AP X5045V14IZ-2.7A
(Note)
X5045V Z AP
X5043P-2.7
X5043P F X5045P-2.7
X5045P F
X5043PZ-2.7 (Note) X5043P Z F X5045PZ-2.7 (Note) X5045P Z F
X5043PI-2.7
X5043P G X5045PI-2.7
X5045P G
X5043PIZ-2.7 (Note) X5043P Z G X5045PIZ-2.7 (Note) X5045P Z G
X5043S8-2.7*
X5043 F
X5045S8-2.7*
X5045 F
X5043S8Z-2.7* (Note) X5043 Z F X5045S8Z-2.7* (Note) X5045 Z F
X5043S8I-2.7*
X5043 G
X5045S8I-2.7*
X5045 G
X5043S8IZ-2.7* (Note) X5043 Z G X5045S8IZ-2.7*
(Note)
X5045 Z G
X5043M8-2.7
AES
X5045M8-2.7
AFB
X5043M8Z-2.7 (Note) DBP
X5045M8Z-2.7 (Note) DBZ
X5043M8I-2.7*
AET
X5045M8I-2.7
AFC
X5043M8IZ-2.7*
(Note)
DBK
X5045M8IZ-2.7 (Note) DBU
X5043V14I-2.7
X5043V G X5045V14I-2.7
X5045V G
X5043V14IZ-2.7
(Note)
X5043V Z G X5045V14IZ-2.7
(Note)
X5045V Z G
*Add "-T1" suffix for tape and reel.
V_CC
RANGE
2.7-5.5V
V_TRIP
RANGE
2.85-3.0
2.55-2.7
TEMP
RANGE
(°C)
0 to 70
0 to 70
-40 to 85
-40 to 85
0 to 70
0 to 70
PACKAGE
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
-40 to 85
-40 to 85
0 to 70
0 to 70
8 Ld SOIC
8 Ld SOIC
(Pb-free)
8 Ld MSOP
8 Ld MSOP (Pb-free)
-40 to 85
-40 to 85
8 Ld MSOP
8 Ld MSOP (Pb-free)
-40 to 85
-40 to 85
0 to 70
0 to 70
-40 to 85
-40 to 85
0 to 70
0 to 70
-40 to 85
-40 to 85
14 Ld TSSOP
14 Ld TSSOP
(Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld PDIP
8 Ld PDIP (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
0 to 70
0 to 70
-40 to 85
-40 to 85
8 Ld MSOP
8 Ld MSOP (Pb-free)
8 Ld MSOP
8 Ld MSOP (Pb-free)
-40 to 85
-40 to 85
14 Ld TSSOP
14 Ld TSSOP
(Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
4
FN8126.2
March 16, 2006