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| X5043S8ZT1 Datasheet, PDF (17/21 Pages) Intersil Corporation – CPU Supervisor with 4K SPI EEPROM | |||
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VTRIP Programming Timing Diagram
VCC
(VTRIP)
VP
WP
CS
tVPS
tPCS
SCK
X5043, X5045
VTRIP
tTSU
tTHD
tVPH
tVPO
tRP
SI
06h
02h
01h or
03h
VTRIP Programming Parameters
PARAMETER
DESCRIPTION
tVPS
VTRIP Program Enable Voltage Setup time
tVPH
VTRIP Program Enable Voltage Hold time
tPCS
VTRIP Programming CS inactive time
tTSU
VTRIP Setup time
tTHD
VTRIP Hold (stable) time
tWC
VTRIP Write Cycle Time
tVPO
VTRIP Program Enable Voltage Off time (Between successive adjustments)
tRP
VTRIP Program Recovery Period (Between successive adjustments)
VP
Programming Voltage
VTRAN
VTRIP Programmed Voltage Range
Vtv
VTRIP Program variation after programming (0-75°C). (Programmed at 25°C.)
VTRIP programming parameters are periodically sampled and are not 100% tested.
MIN MAX UNIT
1
µs
1
µs
1
µs
1
µs
10
ms
10
ms
0
µs
10
ms
15
18
V
1.7 4.75
V
-25
+25
mV
17
FN8126.2
March 16, 2006
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