D2-926XX_14 Datasheet, PDF (33/38 Pages) Intersil Corporation – Intelligent Digital Amplifier and Sound Processor

D2-926xx
MASTER VOLUME ENCODER
The Master Volume Encoder fe a tu er allows assigning of I/O
pins to a quadrature-type encoder that can be used as a
mechanical volume control. The fe a tu er is disabled by default,
but when enabled allows choice of volume control algorithm
association in the audio signal flow, and choice of the I/O pins.
PWM OUTPUT CONFIGURATION
The PWM Output Configuration functions support assignment of
PWM output pins to each of the 12 PWM engines. It allows pin
polarity selection, and choice of enabling or disabling each PWM
engine.
PWM OUTPUT TIMING
The PWM Output Timing controls enable per-channel adjustment
of each PWM output timing. Controls included dead time,
minimum pulse width, and stagger settings between channels.
POWER DOWN OUTPUT
The Power Down Output feature supports setting an output pin
that can connect to power stages, for manually shutting down
power stages during fault detection and system startup. When
enabled, the algorithm supports specification entry of the I/O pin
to be used for the function.
TEMPERATURE SENSING
A thermal protection algorithm supports use of NTC resistors
placed in heat-sensitive areas of the amplifier. The algorithms
run and provide real-time temperature measurement.
Temperature values are available in firmware registers for
reading by a system controller, and set-points in the algorithm
can be used to trigger a controlled-attenuation level reduction or
fault shutdown.
THERMAL MANAGEMENT
An additional thermal protection algorithm supports a high
temperature warning input to trigger controlled-attenuation level
reduction. Rate of change and delay are programmable when the
feature is enabled.
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FN6787.2
July 12, 2012