D2-926XX_14 Datasheet, PDF (21/38 Pages) Intersil Corporation – Intelligent Digital Amplifier and Sound Processor

D2-926xx
Pin Description DAE-3HT (72-Pin) (Continued)
PIN
VOLTAGE DRIVE
NAME
LEVEL STRENGTH
PIN (Note 16) TYPE (V)
(mA)
DESCRIPTION
69 PROTECT1 In
3.3
4
PWM protection input with hysteresis. (One of 8 protection inputs. Specific function, channel
assignment, & optional GPIO is defined by firmware.)
70 PROTECT0 In
3.3
4
PWM protection input with hysteresis. (One of 8 protection inputs. Specific function, channel
assignment, & optional GPIO is defined by firmware.)
71 SDA0 I/O
3.3
/TEMPREF
8 - OD
Two-Wire Serial data port 0, or assignable I/O. Available for NTC temperature sensing reference
as assignable I/O. Function is assigned by firmware.
72 SCL0 I/O
3.3
/TEMPNTC
8 - OD
Two-Wire Serial clock port 0, assignable I/O. Available for NTC temperature sensing reference as
assignable I/O. Function is assigned by firmware.
NOTES:
18. Unless otherwise specified, all pin names are active high. Those that are active low have an “n” prefix.
19. All power and ground pins of same names are to be tied together to all other pins of their same name. (i.e., CVDD pins to be tied together, CGND pins
to be tied together, RVDD pins to be tied together, and RGND pins to be tied together.) CGND and RGND are to be tied together on board. RGND and
PWMGND pins are also internally connected and are to be tied together.
21
FN6787.2
July 12, 2012