D2-45057_14 Datasheet, PDF (3/31 Pages) Intersil Corporation – Intelligent Digital Amplifier PWM Controller and Audio Processor

D2-45057, D2-45157
Table of Contents
Ordering Information ........................................ 2
Absolute Maximum Ratings ............................... 4
Thermal Information ......................................... 4
Recommended Operating Conditions ................. 4
Electrical Specifications ..................................... 4
Performance Specifications ............................... 6
Serial Audio Interface Port Timing .................... 6
Two-Wire (I²C) Interface Port Timing ............... 7
SPI™ Master Mode Interface Port Timing .......... 8
SPI™ Slave Mode Interface Port Timing ............ 8
Pin Configuration............................................... 9
Pin Description ................................................ 10
Typical Performance Characteristics................ 14
Test Considerations ......................................... 14
Full-Bridge Typical Performance Curves.............. 14
Half-Bridge Typical Performance Curves ............. 15
Functional Description..................................... 17
Overview ....................................................... 17
Audio Enhancement Features............................ 17
Serial Audio Digital Input ................................. 17
S/PDIF Digital Audio I/O .................................. 17
Sample Rate Converter .................................... 18
DSP............................................................... 18
Clock and PLL ................................................. 18
Timers ...........................................................18
Audio Outputs ................................................. 18
Output Power Stages ....................................... 18
Output Options ............................................... 19
PWM Audio Outputs ......................................... 19
Control and Operation ..................................... 19
Control Register Summary ............................... 19
I²C 2-Wire Control Interface ............................ 19
Reading and Writing Control Registers............... 19
Control Interface Address Spaces ..................... 20
Storing Parameters to EEPROM......................... 20
Serial Peripheral Interface (SPI) ....................... 20
Reset and Device Initialization.......................... 20
Boot Modes.................................................... 21
Power Supply Requirements ........................... 21
High-Side Gate Drive Voltage ........................... 21
Power Supply Synchronization.......................... 21
Power Sequence Requirements......................... 22
REG5V .......................................................... 22
Pin and Control Block Functions ...................... 22
I/O Control Pins ............................................. 22
nPDN Input Pin .............................................. 22
nERROR[0-3] Output Pins ................................ 22
IREF Pin ........................................................ 22
Configuration Assignment Pin Differences .......... 22
OCFG0, OCFG1 Input Pins................................ 23
nERROR/CFG0 and PSSYNC/CFG1 Pins .............. 23
Temperature Monitoring .................................. 23
Configuration Setting ...................................... 24
Protection ....................................................... 26
Error Reporting .............................................. 26
Short-Circuit and Overcurrent Sensing .............. 26
Protection Monitoring and Control ..................... 26
Thermal Protection and Monitors....................... 26
Graceful Overcurrent and Short Circuit .............. 27
Power Supply Voltage Monitoring ...................... 27
Audio Processing............................................. 27
Audio Processing Signal Flow Blocks.................. 27
Revision History .............................................. 30
Products.......................................................... 30
Package Outline Drawing ................................ 31
3
FN6785.0
July 29, 2010