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ISL12022 Datasheet, PDF (27/28 Pages) Intersil Corporation – Real Time Clock with On Chip ±5ppm Temp Compensation
ISL12022
Measuring Oscillator Accuracy
The best way to analyze the ISL12022 frequency accuracy
is to set the IRQ/FOUT pin for a specific frequency, and look
at the output of that pin on a high accuracy frequency
counter (at least 7 digits accuracy). Note that the IRQ/FOUT
is a drain output and will require a pull-up resistor.
Using the 1.0Hz output frequency is the most convenient as
the ppm error is as expressed in Equation 8:
ppm error = (F OUT – 1 ) • 1e6
(EQ. 8)
Other frequencies may be used for measurement but the
error calculation becomes more complex.
When the proper layout guidelines are observed, the
oscillator should start up in most circuits in less than 1s.
When testing RTC circuits, a common impulse is to apply a
scope probe to the circuit at the X2 pin (oscillator output) and
observe the waveform. DO NOT DO THIS! Although in some
cases you may see a usable waveform, due to the parasitics
(usually 10pF to ground) applied with the scope probe, there
will be no useful information in that waveform other than the
fact that the circuit is oscillating. The X2 output is sensitive to
capacitive impedance so the voltage levels and the
frequency will be affected by the parasitic elements in the
scope probe. Use the FOUT output and a frequency counter
for the most accurate results.
Temperature Compensation Operation
The ISL12022 temperature compensation feature needs to
be enabled by the user. This must be done in a specific order
as follows.
1. Read register 0Dh, the BETA register. This register
contains the 5-bit BETA trimmed value which is
automatically loaded on initial power-up. Mask off the
5LSB’s of the value just read.
2. Bit 7 of the BETA register is the master enable control for
temperature sense operation. Set this to “1” to allow
continuous temperature frequency correction. Frequency
correction will then happen every 60s with VDD applied.
3. Bits 5 and 6 of the BETA register control temperature
compensation in battery-backup mode (see Table 15).
Set the values for the operation desired.
4. Write back to register 0Dh making sure not to change the
5 LSB values, and include the desired compensation
control bits.
Note that every time the BETA register is written with the
TSE bit = 1, a temperature compensation cycle is instigated
and a new correction value will be loaded into the
FATR/FDTR registers (if the temperature changed since the
last conversion).
Also note that registers 0Bh and 0Ch, the ITR0 and ALPHA
registers, should not be changed. If they must be written be
sure to write the same values that are recalled from initial
power-up. The ITR0 register may be written if the user
wishes to re-calibrate the oscillator frequency at room
temperature for aging or board mounting. The original
recalled value can be re-written if desired after testing.
For further information on the operation of the ISL12022 and
temperature compensated RTC’s, see Intersil Application
Note AN1389, “Using Intersil’s High Accuracy Real Time
Clock Module”.
http://www.intersil.com/data/an/AN1389.pdf
Daylight Savings Time (DST) Example
DST involves setting the forward and back times and
allowing the RTC device to automatically advance the time
or set the time back. This can be done for current year, and
future years. Many regions have DST rules that use
standard months, weeks and time of the day which permit a
pre-programmed, permanent setting.
Table 27 shows the example setup for the ISL12022.
TABLE 27. DST EXAMPLE
VARIABLE
VALUE REGISTER VALUE
Month Forward and DST April
Enable
15h
84h
Week and Day Forward 1st Week and 16h
48h
and select Day/Week, not Sunday
Date
Date Forward
not used
17h
00h
Hour Forward
2am
18h
02h
Month Reverse
October
19h
10h
Week and Day Reverse Last Week and 1Ah
78h
and select Day/Week, not Sunday
Date
Date Reverse
not used
1Bh
00h
Hour Reverse
2am
1Ch
02h
The Enable bit (DSTE) is in the Month forward register, so
the BCD value for that register is altered with the additional
bit. The Week and Day values along with Week/Day vs Date
select bit is in the Week/Day register, so that value is also
not straight BCD. Hour and Month are normal BCD, but the
Hour doesn’t use the MIL bit since Military time PM values
are already discretely different from AM/PM time PM values.
The DST reverse setting utilizes the option to select the last
week of the month for October, which could have 4 or 5
weeks but needs to have the time change on the last
Sunday.
Note that the DSTADJ bit in the status register monitors
whether the DST forward adjustment has happened. When it
is “1”, DST forward has taken place. When it is “0”, then
either DST reverse has happened, or it has been reset either
by initial power-up or if the DSTE bit has been set to “0”.
27
FN6659.2
June 23, 2009