80C86_06 Datasheet, PDF (23/37 Pages) Intersil Corporation – CMOS 16-Bit Microprocessor

80C86
AC Electrical Specifications
V_CC = 5.0V ±10%
V_CC = 5.0V ±10%;
V_CC = 5.0V ±10%;
V_CC = 5.0V ±5%;
T_A = 0^oC to +70^oC (C80C86, C80C86-2)
T_A = -40^oC to +85^oC (I80C86, I80C86-2)
T_A = -55^oC to +125^oC (M80C86)
T_A = -55^oC to +125^oC (M80C86-2) (Continued)
MAX MODE SYSTEM (USING 82C88 BUS CONTROLLER)
TIMING REQUIREMENTS
80C86
80C86-2
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX UNITS TEST CONDITIONS
(35) TCVNV Control Active Delay (Note 10)
5
45
5
45
ns C_L = 100pF for All
80C86 Outputs (In
Addition to 80C86
Self Load)
(36) TCVNX Control Inactive Delay (Note 10)
10
45
10
45
(37) TAZRL Address Float to Read Active
0
0
(38) TCLRL RD Active Delay
10
165
10
100
(39) TCLRH RD Inactive Delay
10
150
10
80
(40) TRHAV RD Inactive to Next Address Active
TCLCL
-45
TCLCL
-40
ns C_L = 100pF
ns C_L = 100pF
ns C_L = 100pF
ns C_L = 100pF
ns C_L = 100pF
(41) TCHDTL Direction Control Active Delay
(Note 10)
50
50
ns C_L = 100pF
(42) TCHDTH Direction Control Inactive Delay
(Note 10)
30
30
ns C_L = 100pF
(43) TCLGL GT Active Delay
(44) TCLGH GT Inactive Delay
(45) TRLRH RD Width
10
85
0
50
10
85
0
50
2TCLC
L -75
2TCLC
L -50
ns C_L = 100pF
ns C_L = 100pF
ns C_L = 100pF
(46) TOLOH Output Rise Time
20
15
ns From 0.8V to 2.0V
(47) TOHOL Output Fall Time
20
15
ns From 2.0V to 0.8V
NOTES:
10. Signal at 82C84A or 82C88 shown for reference only.
11. Setup requirement for asynchronous signal only to guarantee recognition at next CLK.
12. Applies only to T2 state (8ns into T3).
13. The 80C86 actively pulls the RQ/GT pin to a logic one on the following clock low time.
14. Status lines return to their inactive (logic one) state after CLK goes low and READY goes high.
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