ISL12022M_10 Datasheet, PDF (19/31 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM,Integrated ±5ppm Temperature Compensation and Auto Daylight Saving

ISL12022M
ALPHA Register (ALPHA)
ADD
R
0Ch
TABLE 13. ALPHA REGISTER
7
6
5
4
3
2
1
0
D ALPHA6 ALPHA5 ALPHA4 ALPHA3 ALPHA2 ALPHA1 ALPHA0
The ALPHA variable is 8 bits and is defined as the
temperature coefficient of crystal from -40°C to T0, or
the ALPHA Cold (there is an Alpha Hot register that
must be programmed as well). It is normally given in
units of ppm/°C², with a typical value of -0.034. The
ISL12022M device uses a scaled version of the absolute
value of this coefficient in order to get an integer value.
Therefore, ALPHA <7:0> is defined as the (|Actual
ALPHA Value| x 2048) and converted to binary. For
example, a crystal with Alpha of -0.034ppm/°C² is first
scaled (|2048*(-0.034)| = 70d) and then converted to
a binary number of 01000110b.
The practical range of Actual ALPHA values is from
-0.020 to -0.060.
The ISL12022M has a preset ALPHA value
corresponding to the crystal in the module. This value
is recalled on initial power-up and is preset in
device production. It is READ ONLY and cannot
be overwritten by the user.
BETA Register (BETA)
TABLE 14.
ADDR 7 6 5
4
3
2
1
0
0Dh TSE BTSE BTSR BETA4 BETA3 BETA2 BETA1 BETA0
The BETA register has special Write properties. Only the
TSE, BTSE and BTSR bits can be written; the BETA bits
are READ-ONLY. A write to both bytes in this register will
only change the 3 MSB’s (TSE, BTSE, BTSR), and the
5 LSB’s will remain the same as set at the factory.
TEMPERATURE SENSOR ENABLED BIT (TSE)
This bit enables the Temperature Sensing operation,
including the temperature sensor, A/D converter and
FATR/FDTR register adjustment. The default mode after
power-up is disabled: (TSE = 0). To enable the operation,
TSE should be set to 1. (TSE = 1). When temp sense is
disabled, the initial values for IATR and IDTR registers
are used for frequency control.
When TSE is set to 1, the temperature conversion cycle
begins and will end when two temperature conversions
are completed. The average of the two conversions is in
the TEMP registers.
TEMP SENSOR CONVERSION IN BATTERY MODE
BIT (BTSE)
This bit enables the Temperature Sensing and Correction
in battery mode. BTSE = 0 (default) no conversion, Temp
Sensing or Compensation in battery mode. BTSE = 1
indicates Temp Sensing and Compensation enabled in
battery mode. The BTSE is disabled when the battery
voltage is lower than 2.7V. No temperature
compensation will take place with VBAT<2.7V.
FREQUENCY OF TEMPERATURE SENSING AND
CORRECTION BIT (BTSR)
This bit controls the frequency of Temp Sensing and
Correction. BTSR = 0 default mode is every 10 minutes,
BTSR = 1 is every 1.0 minute. Note that BTSE has to be
enabled in both cases. See Table 15.
TABLE 15. FREQUENCY OF TEMPERATURE SENSING
AND CORRECTION BIT
BTSE
BTSR
TC PERIOD IN
BATTERY MODE
0
0
OFF
0
1
OFF
1
0
10 Minutes
1
1
1 Minute
The temperature measurement conversion time is the
same for battery mode as for V_DD mode, approximately
22ms. The battery mode current will increase during
this conversion time to typically 68µA. The average
increase in battery current is much lower than this due
to the small duty cycle of the ON-time versus OFF-time
for the conversion.
To figure the average increase in battery current, we take
the change in current times the duty cycle. For the
1 minute temperature period, the average current is
expressed in Equation 1:
ΔI_BAT =
0_----._--0_---2_---2_----s_-
60 s
×
68 μ A =
250 n A
(EQ. 1)
For the 10 minute temperature period the average
current is expressed in Equation 2:
ΔI_BAT =
0_----._--0_---2_---2_----s_-
600 s
×
68 μ A =
25 n A
(EQ. 2)
If the application has a stable temperature environment
that doesn’t change quickly, the 10 minute option will
work well and the backup battery lifetime impact is
minimized. If quick temperature variations are expected
(multiple cycles of more than 10° within an hour), then
the 1 minute option should be considered and the slightly
higher battery current figured into overall battery life.
GAIN FACTOR OF AT BIT (BETA<4:0>)
Beta is specified to take care of the Cm variations of the
crystal. Most crystals specify Cm around 2.2fF. For
example, if Cm > 2.2fF, the actual AT steps may reduce
from 1ppm/step to approximately 0.80ppm/step. Beta
is then used to adjust for this variation and restore the
step size to 1ppm/step.
BETA values are limited in the range from 01000 to
11111, as shown in Table 16. To use Table 16, the device
is tested at two AT settings as follows:
BETA VALUES = (AT(max) - AT (min))/63, where:
19
FN6668.7
June 4, 2010