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80960CF-40 Datasheet, PDF (70/77 Pages) Intel Corporation – 80960CF-40, -33, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR EMBEDDED MICROPROCESSOR
80960CF-40, -33, -25, -16
A
PCLK
ADS
A31:4, SUP,
DMA, INST,
D/C, BE3:0,
LOCK
W/R
Quad-Word Write Request
NWAD = 0, NWDD = 0, NWDA = 0
Ready Enabled
Valid
BLAST
DT/R
DEN
READY
BTERM
A3:2
See Note
00
01
10
11
WAIT
D31:0
D0
D1
D2
D3
Note: READY adds memory access time to data transfers, whether or not the
bus access is a burst access. BTERM interrupts a bus access, whether or not
the bus access has more data transfers pending. Either the READY signal or
the BTERM signal will terminate a bus access if the signal is asserted during
the last (or only) data transfer of the bus access.
Figure 41. Terminating a Burst with BTERM
F_CX042A
64
PRELIMINARY