80960MC Datasheet, PDF (39/39 Pages) Intel Corporation – EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT AND MEMORY MANAGEMENT UNIT

80960MC
PBM BUS Ta _{Td Th} Th _{Th Th Ta Td Td Th Th Th Th Th Ti}
STATE
SBM BUS
STATE
Thr Thr Thr
Ta Td
Tr Thr Thr Thr Thr Ta Td Td
Tr
Ti
CLK
LAD31_
LAD0
Addr Data
Addr Data
Addr Data Data
Addr Data Data
W/R#
PBM ALE#
SBM ALE#
READY#
SBM
HOLDR
PBM
HOLD
PBM
HLDA
SBM
HLDAR
A4492-01
Figure 28. Bus Exchange Transaction (PBM = Primary Bus Master, SBM = Secondary Bus Master)
5.0 REVISION HISTORY
No revision history was maintained in earlier revisions of this data sheet. All errata that has been identified to
date is incorporated into this revision. The sections significantly changed since the previous revision are:
Section
Last
Rev.
Description
This is the initial commercial data sheet for the A80960MC.
PRELIMINARY
35