80960MC Datasheet, PDF (24/39 Pages) Intel Corporation – EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT AND MEMORY MANAGEMENT UNIT

80960MC
Table 7. 80960MC AC Characteristics (25 MHz)
Symbol
Parameter
Min Max Units
Input Clock
T₁ Processor Clock Period (CLK2)
20
125
ns
T₂ Processor Clock Low Time (CLK2) 5
ns
T₃ Processor Clock High Time (CLK2) 5
ns
T₄ Processor Clock Fall Time (CLK2)
10
ns
T₅ Processor Clock Rise Time (CLK2)
10
ns
Synchronous Outputs
T₆ Output Valid Delay
2
18
ns
T_6H HLDA Output Valid Delay
4
23
ns
T₇ ALE Width
12
ns
T₈ ALE Output Valid Delay
2
18
ns
T₉ Output Float Delay
2
18
ns
T_9H HLDA Output Float Delay
4
20
ns
Synchronous Inputs
T₁₀ Input Setup 1
3
ns
T₁₁ Input Hold
5
ns
T_11H HOLD Input Hold
4
ns
T₁₂ Input Setup 2
7
ns
T₁₃ Setup to ALE Inactive
8
ns
T₁₄ Hold after ALE Inactive
8
ns
T₁₅ Reset Hold
3
ns
T₁₆ Reset Setup
5
ns
T₁₇ Reset Width
820
ns
NOTES:
Notes
V_IN = 1.5V
V_IL = 10% Point = 1.2V
V_IH = 90% Point = 0.1V + 0.5 V_CC
V_IN = 90% Point to 10% Point (1)
V_IN = 10% Point to 90% Point (1)
(2)
(2)
(3)
(3)
41 CLK2 Periods Minimum
1. Clock rise and fall times are not tested.
2. A float condition occurs when the maximum output current becomes less than I_LO. Float delay is not tested; however, it
should not be longer than the valid delay.
3. LAD31:0, BADAC, HOLD, LOCK and READY are synchronous inputs. IAC/INT₀, INT₁, INT₂/INT_R and INT₃ may be syn-
chronous or asynchronous.
20
PRELIMINARY