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XC2361A Datasheet, PDF (99/123 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance
XC2361A, XC2363A, XC2364A, XC2365A
XC2000 Family Derivatives / Base Line
Electrical Parameters
4.6.3 External Clock Input Parameters
These parameters specify the external clock generation for the XC236xA. The clock can
be generated in two ways:
• By connecting a crystal or ceramic resonator to pins XTAL1/XTAL2.
• By supplying an external clock signal. This clock signal can be supplied either to
pin XTAL1 (core voltage domain) or to pin CLKIN1 (IO voltage domain).
If connected to CLKIN1, the input signal must reach the defined input levels VIL and VIH.
If connected to XTAL1, a minimum amplitude VAX1 (peak-to-peak voltage) is sufficient for
the operation of the on-chip oscillator.
Note: The given clock timing parameters (t1 … t4) are only valid for an external clock
input signal.
Note: Operating Conditions apply.
Table 26 External Clock Input Characteristics
Parameter
Input voltage range limits
for signal on XTAL1
Input voltage (amplitude)
on XTAL1
XTAL1 input current
Oscillator frequency
Symbol
Limit Values
Min. Typ. Max.
VIX1 SR -1.7 + –
1.7
VDDI
VAX1 SR 0.3 × –
–
VDDI
IIL CC –
–
±20
fOSC CC 4
–
40
4
–
16
Unit Note / Test
Condition
V
1)
V Peak-to-peak
voltage2)
μA 0 V < VIN < VDDI
MHz Clock signal
MHz Crystal or
Resonator
High time
t1 SR 6
–
–
ns
Low time
t2 SR 6
–
–
ns
Rise time
t3 SR –
8
8
ns
Fall time
t4 SR –
8
8
ns
1) Overload conditions must not occur on pin XTAL1.
2) The amplitude voltage VAX1 refers to the offset voltage VOFF. This offset voltage must be stable during the
operation and the resulting voltage peaks must remain within the limits defined by VIX1.
Data Sheet
99
V2.0, 2009-03