XC2361A Datasheet, PDF (115/123 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2361A, XC2363A, XC2364A, XC2365A
XC2000 Family Derivatives / Base Line
Electrical Parameters
Table 36 JTAG Interface Timing Parameters for Lower Voltage Range
Parameter
Symbol
Values
Unit Note /
Min. Typ. Max.
Test Condition
TCK clock period
TCK high time
TCK low time
TCK clock rise time
TCK clock fall time
TDI/TMS setup
to TCK rising edge
t₁ SR 50
–
–
ns
t₂ SR 16
–
–
ns
t₃ SR 16
–
–
ns
t₄ SR –
–
8
ns
t₅ SR –
–
8
ns
t₆ SR 6
–
–
ns
TDI/TMS hold
t₇ SR 6
–
–
ns
after TCK rising edge
TDO valid
t₈ CC –
after TCK falling edge¹⁾
32
36
ns
TDO high imped. to valid t₉ CC –
from TCK falling edge²⁾³⁾
32
36
ns
TDO valid to high imped. t₁₀ CC –
from TCK falling edge¹⁾
32
36
ns
TDO hold after
TCK falling edge¹⁾
t₁₈ CC 5
–
–
ns
1) The falling edge on TCK is used to generate the TDO timing.
2) The setup time for TDO is given implicitly by the TCK cycle time.
3) The setup time for TDO is given implicitly by the TCK cycle time.
t₁
0.5 V_DDP
t₅
t₂
t₃
Figure 26 Test Clock Timing (TCK)
0.9 V_DDP
t₄
0.1 V_DDP
MC_JTAG_TCK
Data Sheet
115
V2.0, 2009-03