XC2361A Datasheet, PDF (79/123 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2361A, XC2363A, XC2364A, XC2365A
XC2000 Family Derivatives / Base Line
Electrical Parameters
1) Not subject to production test - verified by design/characterization. Hysteresis is implemented to avoid
metastable states and switching due to internal ground bounce. It cannot suppress switching due to external
system noise under all conditions.
2) The maximum deliverable output current of a port driver depends on the selected output driver mode, see
Section 4.6.4. The limit for pin groups must be respected.
3) As a rule, with decreasing output current the output levels approach the respective supply level (V_OL→V_SS,
V_OH→V_DDP). However, only the levels for nominal output currents are verified.
4) This specification is not valid for outputs which are switched to open drain mode. In this case the respective
output will float and the voltage is determined by the external circuit.
5) An additional error current (I_INJ) will flow if an overload current flows through an adjacent pin. Please refer to
the definition of the overload coupling factor K_OV.
The leakage current value is not tested in the lower voltage range but only in the upper voltage range. This
parameter is ensured by correlation.
6) The given values are worst-case values. In production test, this leakage current is only tested at 125°C; other
values are ensured by correlation. For derating, please refer to the following descriptions:
Leakage derating depending on temperature (T_J = junction temperature [°C]):
I_OZ = 0.03 × e^{(1.35 + 0.028×TJ)} [μA]. For example, at a temperature of 95°C the resulting leakage current is 1.65 μA.
Leakage derating depending on voltage level (DV = V_DDP - V_PIN [V]):
I_OZ = I_OZtempmax - (1.3 × DV) [μA]
This voltage derating formula is an approximation which applies for maximum temperature.
Because pin P2.8 is connected to two pads (standard pad and high-speed clock pad), it has twice the normal
leakage.
7) Keep current: Limit the current through this pin to the indicated value so that the enabled pull device can keep
the default pin level: V_PIN ≥ V_IH for a pullup; V_PIN ≤ V_IL for a pulldown.
Force current: Drive the indicated minimum current through this pin to change the default pin level driven by
the enabled pull device: V_PIN ≤ V_IL for a pullup; V_PIN ≥ V_IH for a pulldown.
These values apply to the fixed pull-devices in dedicated pins and to the user-selectable pull-devices in
general purpose IO pins.
8) Not subject to production test - verified by design/characterization.
Because pin P2.8 is connected to two pads (standard pad and high-speed clock pad), it has twice the normal
capacitance.
Data Sheet
79
V2.0, 2009-03