TDA5250D2 Datasheet, PDF (68/97 Pages) Infineon Technologies AG – ASK/FSK 868MHz Wireless Transceiver

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TDA 5250 D2
preliminary
Applications
4.6 Data Slicer - Slicing Level
The data slicer is an analog-to-digital converter. It is necessary to generate a
threshold value for the negative comparator input (data slicer). The TDA5250
offers an RC integrator and a peak detector which can be selected via logic.
Independent of the choice, the peak detector outputs are always active.
4.6.1 RC Integrator
Table 4-12 Sub Address 00H: CONFIG
Bit Function
Description
D15 SLICER
0= LP, 1= Peak Detector
Default
SET
0
0
Necessary external component (Pin14): C_SLC
This integrator generates the mean value of the data filter output. For a stable
threshold value, the cut-off frequency has to be lower than the lowest signal
frequency. The cutoff frequency results from the internal resistance R=100kΩ
and the external capacitor C_SLC on Pin14.
Cut-off frequency:
{ } f
cut − off
=
2π
1
⋅100 kΩ ⋅C_SLC
< Min
f
Signal
Component calculation: (rule of thumb)
T_L – longest period of no signal change
C
SLC
≥
3 ⋅T_L
100 k Ω
[4 – 30]
[4 – 31]
DataSlicer
+
-
Slicer Threshold
Contr.
Logic
DATA
28
+ Peak
Detector
Data
Filter
Signal 100k
R
- Peak
Detector
PDP
13
100k
100k
SLC
14
PDN
12
Vcc
C_SLC
Figure 4-25 Slicer Level using RC Integrator
SLC_RC.wmf
Wireless Components
4 - 28
Specification, July 2002