TDA5250D2 Datasheet, PDF (31/97 Pages) Infineon Technologies AG – ASK/FSK 868MHz Wireless Transceiver

confidential
TDA 5250 D2
preliminary
Functional Description
3.4.16 Wakeup Logic
SLAVE MODE
(d e fa u lt)
MODE_1 = 0
MODE_2 = 0
3_modes.wmf
SELF POLLING
MODE
MODE_1 = 1
MODE_2 = X
Figure 3-9 Wakeup Logic States
TIM ER M O DE
MODE_1 = 0
MODE_2 = 1
Table 3-28 MODE settings: CONFIG register
MODE_1
MODE_2
Mode
0
0
SLAVE MODE
0
1
TIMER MODE
1
X
SELF POLLING MODE
SLAVE MODE: The receive and transmit operation is fully controlled by an
external control device via the respective RxTx, AskFsk, PwdDD, and Data
pins. The wakeup logic is inactive in this case.
After RESET or 1^st Power-up the chip is in SLAVE MODE. By setting MODE_1
and MODE_2 in the CONFIG register the mode may be changed.
SELF POLLING MODE: The chip turns itself on periodically to receive using a
built-in 32kHz RC oscillator. The timing of this is determined by the ON_TIME
and OFF_TIME registers, the duty cycle can be set between 0 and 100% in
31.25µs increments. The data detect logic is enabled and a 15µs LOW impulse
is provided at PwdDD pin (Pin 27), if the received data is valid.
ON_TIME
OFF_TIME
ON_TIME
Action
PwdDD pin in
SELF POLLING MODE
RX ON: valid Data
min. 2.6ms _15µs
RX ON: invalid Data
t
t
timing_selfpllmode.wmf
Figure 3-10 Timing for Self Polling Mode (ADC & Data Detect in one shot mode)
Note: The time delay between start of ON time and the 15µs LOW impulse is
2.6ms + 3 period of data rate.
Wireless Components
3 - 21
Specification, July 2002